| IUVSTA 15th International Vacuum Congress (IVC-15), AVS 48th International Symposium (AVS-48), 11th International Conference on Solid Surfaces (ICSS-11) | |
| Plasma Science | Thursday Sessions |
Click a paper to see the details. Presenters are shown in bold type.
| PS-ThP1 Damage Recovery of Etched PZT Thin Films in CF@sub 4@/Cl@sub 2@ Plasma with the Addition of Ar, N@sub 2@ and O@sub 2@ M.G. Kang, K.T. Kim, C.I. Kim, Chung-Ang University, Korea |
| PS-ThP2 Dry Etching Characteristics of YMnO@sub 3@ Thin Films Using Inductive Coupled CF@sub 4@/Cl@sub 2@/Ar Plasma C.I. Kim, D.P. Kim, Chung-Ang University, Korea |
| PS-ThP3 Reduction of Plasma-Induced Damage through Ion-Ion Synchronous Bias L.J. Overzet, S.K. Kanakasabapathy, University of Texas at Dallas, K.P. Cheung, M.V. Malyshev, Agere Systems |
| PS-ThP4 Investigation of Nitride Morphology after Self-Aligned Contact Etch D. Keil, J.W. Shon, B.A. Helmer, T. Chien, P. Gopaladasu, Lam Research Corporation, J. Kim, Samsung Corporation, H. Hwang, NASA Ames Research Center |
| PS-ThP5 Development of Self-aligned Contact Technology on a Capacitively Coupled System T. Chien, C. Nelson, D. Keil, E.A. Hudson, K. Makhratechev, Lam Research Corporation |
| PS-ThP6 Surface Analysis of a High Selective Polysilicon to Oxide Plasma Etching Process T. Tai, S. Molis, W. Yan, IBM, SRDC |
| PS-ThP7 Investigation of the Performance of MERIE Etcher for Extended Conditions of Consumable Upper Electrode/Gas Distribution Plate Lifetime D.V. Semach, Silicon Manufacturing Partners Pte. Ltd., Singapore |
| PS-ThP8 Electron-Temperature Control in 915 MHz ECR Plasma N. Itagaki, Kyushu University, Japan, S. Kawakami, N. Ishii, Tokyo Electron Co. Ltd., Japan, Y. Kawai, Kyushu University, Japan |
| PS-ThP9 High Performance SiO@sub 2@ Etching using C@sub 4@F@sub8@ and C@sub 5@F@sub8@ S.H. Rha, D. You, C.W. Lee, J.Y. Choi, Advanced Technology Line, Korea |
| PS-ThP10 Applicability of a Hollow-electrode Plasma Jet System for Etching of Diamond-like Carbon (DLC) Films P.E. Lima, H.S. Maciel, M. Massi, Instituto Tecnologico de Aeronautica - ITA, Brazil, R.D. Mansano, LSI - Escola Politecnica - USP, Brazil, G. Petraconi, W. Urruchi, C. Otani, Instituto Tecnologico de Aeronautica - ITA, Brazil |
| PS-ThP11 Influence of Polymerization on Pressure Control System Performance during Dielectric Etch Processes D.V. Semach, Silicon Manufacturing Partners Pte. Ltd., Singapore |
| PS-ThP13 Challenges in 0.1µm Line and Space Nitride Hard Mask Etching Y.S. Chae, J. Kim, Samsung Semiconductor R&D Center, Korea, W.M. Ahn, J.W. Shon, Lam Research Corporation, W.S. Lee, I.S. Kim, Y. Kang, Samsung Semiconductor R&D Center, Korea, J.P. Lee, B.K. Kong, Lam Research Corporation, C.J. Kang, J.T Moon, Samsung Semiconductor R&D Center, Korea |
| PS-ThP14 Trench Etch Characteristics of Via-first Dual Damascene Process on 0.15µm SRAM Technology. W.-S. Kim, J.-I. Cho, I.-S. Choi, J.-J. Lee, H.-S. Shin, H.-S. Yang, Hynix Semiconductor Inc., South Korea |
| PS-ThP15 Etching Characteristics for Porous Silica (k=1.5) by Using NLD Plasma in a Low Pressure Y. Morikawa, N. Mizutani, T. Hayashi, T. Uchida, ULVAC Japan Ltd. |
| PS-ThP16 Trench Etch Challenges in a Cu/Low-k Via-First Dual Damascene Scheme P. Jiang, H. Hong, Q. Hong, K.J. Newton, Texas Instruments, Inc. |
| PS-ThP17 N@sub 2@ Addition Effect on Highly Accurate Organic Low-k Etching Process Y. Morikawa, M. Ozawa, N. Mizutzni, T. Hayashi, T. Uchida, ULVAC JAPAN Ltd. |
| PS-ThP18 Damage Free Gate Shrinkage Method Using Low Temperature Si@sub 3@N@sub 4@ Film Deposition and SF@sub 6@/O@sub 2@ Gas Mixture Etching C.R. LIM, J.H Shin, LG-Elite (LG-Electronics Institute of Technology), South Korea |
| PS-ThP19 A Study on the Polymer Residues Formation at the Via-hole and its Removal by Remote Oxygen/Nitrogen and Hydrogen Plasma S.B. Kim, H. Soh, Y. Kim, Y.C. Kim, H. Jeon, Hanyang University, Korea |
| PS-ThP20 Studies on Photoresist Etching in Inductively Coupled Plasmas X. Xu, P. Shoenborn, LSI Logic |
| PS-ThP21 Method to Prevent Notching in Polysilicon Gate Etch Process with Long Over-Etch W. Pau, M. Shen, Applied Materials |
| PS-ThP23 Chemical Mechanisms of the Etching and Non-etching of Magnetic Materials in CO/NH@sub 3@ Plasmas A.S. Orland, R. Blumenthal, Auburn University |
| PS-ThP24 Resist Trimming Process Using High Density Plasma for Sub-0.1µm MOSFET C.Y. Sin, B.H. Chen, National University of Singapore, K. Loh, P. Yelehanka, Chartered Semiconductor Manufacturing, Singapore |
| PS-ThP25 The Geometric and Chemical Effect of Polymer Deposition and Etch-product Redeposition on the Etching of SiO@sub 2@ Trench Sidewall in a CF@sub 4@ Plasma J.H. Min, S.W. Hwang, G.R. Lee, S.H. Moon, Seoul National University, Korea |
| PS-ThP26 Evaluation of High Temperature Process in W/poly Si Gate Stack Etching in a Dual Frequency Plasma Reactor J. Hong, J.S. Jeon, C.J. Kang, Samsung Electronics, Korea |
| PS-ThP27 The Effect of Reflected Ions on the Etching of Silicon Dioxide Surface in the Fluorocarbon Plasma G.R. Lee, S.H. Hwang, J.H. Min, S.H. Moon, Seoul National University, Korea |
| PS-ThP28 Effect of Ion Bombardment on Developed Photoresist Morphology during Reactive Etch Processes for sub 0.25 micron Semiconductor Devices M. Naeem, R. Wise, IBM Microelectronics Division, F. Wang, Cypress Semiconductors, G. Worth, D. Dobuzinsky, IBM Microelectronics Division, Z. Lu, Infineon Technologies, A. Hadi, Conexant |
| PS-ThP29 Study on the Low Angle Forward Reflected Neutral Beam Etching System D.H. Lee, J.W. Bae, S.D. Park, G.Y. Yeom, Sungkyunkwan University, Korea |
| PS-ThP30 Highly Selective Etching of Al/AlN Structures for Metallization of SAW Devices F. Engelmark, I.V. Katardjiev, G.F. Iriarte, Uppsala University, Sweden |
| PS-ThP31 W/WNx/Dual-Poly Stack Gate Etching for 0.15 µm Tech. Full CMOS SRAM B.-K. Lee, Y.-J. Choi, I.-K. Yang, I.-S. Seo, H.-S. Shin, H.-S. Yang, Hynix Semiconductor Inc., South Korea |
| PS-ThP32 Trimming Photoresist in a DPS(TM)II 300mm Poly Etch System - Control of Trimming Rate, Uniformity and Stability M. Shen, O. Yauw, N. Gani, C. Lin, Y. Lai, M. Chu, Applied Materials |
| PS-ThP33 Effects of Gas Chemistry of Inductively Coupled Plasmas on the Multi-Layer Gate Metal Etching Characteristics for TFT-LCD Devices Y.J. Lee, C.H. Yi, B.K. Song, M.J. Chung, Sungkyunkwan University, Korea, M.P. Hong, Samsung Semiconductors, Korea, G.Y. Yeom, Sungkyunkwan University, Korea |
| PS-ThP34 The Influence of Ar Flow Rate on Photoresist Selectivity in High Density Plasma Etching of SiO@sub2@ E. Haikata, S. Sasaki, T. Yoshida, K. Nojiri, Lam Research Co., Ltd, Japan |
| PS-ThP35 Novel Organic Low-k Dielectric Etching by Using CH@sub 3@NH@sub 2@ / N@sub 2@ Plasma H. Nakagawa, Matsushita Electric Co., Ltd., Japan, Y. Morikawa, T. Hayashi, ULVAC JAPAN Ltd. |
| PS-ThP36 Low Temperature Etch Characteristics Using 193 nm ArF Photoresist Below 0.1µm Device W.S. Lee, Samsung Electronics, South Korea, J.W. Shon, B.K. Kong, Lam Research Corporation, J. Kim, E.S. Chae, Samsung Electronics, South Korea |
| PS-ThP37 0.1µm Line and Space Nitride Hard Mask Open Process Using Ar/C@sub 2@F@sub 6@/O@sub 2@ Plasma W.S. Lee, Samsung Electronics, J.W. Shon, B.K. Kong, E.A. Hudson, Lam Research Corporation |