In this study, we investigate the factors that can prevent notching in polysilicon gate etch process with very long over-etch. Conventionally, process optimization focuses on varying the parameters in over-etch to prevent notching. The effect of main etch and the interactions of main etch and over-etch are often overlooked. This paper explores the effect of main etch as well as the coupling between main etch and over-etch in notching elimination. The process consists of a timed main etch 1 (ME1) with CF@sub4@/Cl@sub2@/N@sub2@ chemistry followed by a HBr/Cl@sub2@/He-O@sub2@ main etch 2 (ME2) step . Then a high selectivity over-etch (OE) step uses HBr/He-O@sub2@ to etch any remaining polysilicon residue. ME2 matrix results reveal that this step plays a significant role in notching prevention. For ME2 step, a high pressure, high bias power, high HBr/Cl@sub2@ ratio and high He-O@sub2@ flow are most effective in preventing notching. For OE step, low pressure, low He-O@sub2@ flow and low source power are most effective in prevent notching. There are two main mechanisms that are responsible for notching prevention in ME2: (1) profile modification through ME2 and OE interaction and (2) sidewall passivation enhancement by ME2 only. High pressure in ME2 prevents notching through the first mechanism by having a taper profile after ME2 endpoint. This profile is then modified by OE so that a vertical profile is achieved. The effect of bias power in notching reduction, on the other hand, is attributed to the second mechanism. High bias power densifies the sidewall passivation to provide better protection at the bottom of the film, thus preventing notching.