IUVSTA 15th International Vacuum Congress (IVC-15), AVS 48th International Symposium (AVS-48), 11th International Conference on Solid Surfaces (ICSS-11)
    Plasma Science Thursday Sessions
       Session PS-ThP

Paper PS-ThP31
W/WNx/Dual-Poly Stack Gate Etching for 0.15 µm Tech. Full CMOS SRAM

Thursday, November 1, 2001, 5:30 pm, Room 134/135

Session: Plasma Etching Poster Session
Presenter: B.-K. Lee, Hynix Semiconductor Inc., South Korea
Authors: B.-K. Lee, Hynix Semiconductor Inc., South Korea
Y.-J. Choi, Hynix Semiconductor Inc., South Korea
I.-K. Yang, Hynix Semiconductor Inc., South Korea
I.-S. Seo, Hynix Semiconductor Inc., South Korea
H.-S. Shin, Hynix Semiconductor Inc., South Korea
H.-S. Yang, Hynix Semiconductor Inc., South Korea
Correspondent: Click to Email
As SRAM cell composed of pMOS and nMOS is scaled down to deep submicron regime, the surface channel pMOS with p+ poly Si gate is a key technology to realize high performance full CMOS SRAM device, because of its strong immunity to short channel effect. Another important issue to be considered with scaling down of the device is reduction of resistance-capacitance delay along channel width. The W/WNx/Dual-Poly stacked-gate electrode is promising method for these requirements. In the present study, we investigated the effect of gas chemistry on the W/WNx etching characteristics such as profile angle, surface morphology of poly Si and selectivity of the W/WNx over SiON hard mask and poly Si, respectively. Physical features were analyzed with SEM and TEM, and electrical properties were measured. The surface analysis of etched W/WNx film with XPS and plasma analysis with L/P(Langmuir Probe), OES(Optical Emission Spectroscopy), RGA(Residual Gas Analysis), and Posi-SIMS were also performed. When Cl2 was added to NF3, the laternal etching in W/WNx was suppressed due to increase of polymerization. In addition, the selectivity of the W/WNx over SiON was improved by the increase in etch rate of W/WNx and also the decrease in that of SiON induced from the change of plasma state. In case of Ar and O2 addition, the selectivity of W/WNx over poly Si was increased, and consequently sublayer poly Si loss was reduced during over etching. Finally, the addition of CF4 to NF3 made the surface morphology of poly Si smooth resulting from more uniform W/WNx etching during the over etching. On the basis of these results, W/WNx/Dual Poly stack gate etch process having a vertical profile, no sub Si attack and no residue could be achieved with NF3/Cl2/CF4/O2 gas for W/WNx etch and with HBr/Cl2/O2 gas for poly Si etch for 0.15 Tech. SRAM and beyond. Keywords: etching, tungsten, dual gate, SRAM, surface channel pMOS.