PS2-TuP1
Development of a Dry Etching Profile Simulator in a High-Density, Low-Pressure Plasma
J. Saussac, A. Quintal-Leonard, J. Margot, Université de Montréal, Canada, M. Chaker, INRS-Energie, Matériaux et Télécommunications, Canada |
PS2-TuP2
Enhanced Mechanical Properties of PDEMS@super TM@ Interlayer Dielectric Materials through Tailoring Porogen and OSG Precursor
M.K. Haas, M.L. O'Neill, B.K. Peterson, R.N. Vrtis, S.J. Weigel, D.J. Wu, Air Products and Chemicals |
PS2-TuP3
A Comparative Study of Wafer Edge, Backside and Bevel Etching Properties for Oxide, TiN and Amorphous Carbon Films with Torus-Shaped Capacitive Coupled Plasma Source
S.-H. Cho, J.-H. Yang, I.-S. Choi, J.-K. Kim, H.-J. Lee, B.-H. Choi, J.W. Kim, HYNIX Semiconductor Inc, Republic of Korea |
PS2-TuP5
Etching of Ultra-low-k BEOL Material with High Density Plasma
T. Nishizuka, T. Nozawa, Tokyo Electron, LTD., Japan |
PS2-TuP6
Study on the Plasma Damage by Spacer Oxide Etching of MOSFET Device
H. Ahn, J.S. Lee, S.B. Kim, K.D. Kim, B.H. Lim, D.G. Choi, D.S. Kim, Y.W. Song, J.W. Kim, HYNIX Semiconductor Inc., Republic of Korea |
PS2-TuP7
Plasma Chemistries for High-Aspect-Ratio Dielectric Etching Beyond 65 nm Node
T.L. Anglinmatumona, San Jose State University, C.T. Gabriel, Advanced Micro Devices |
PS2-TuP8
Formation of Silicon Nitride Nano-Pillar Hard-Mask Patterns in Dual-Frequency Superimposed Capacitively Coupled Plasma and Their Application to Nano-Scale Si Etching
C.K. Park, C.H. Lee, H.T. Kim, N.-E. Lee, Sungkyunkwan University, Korea |
PS2-TuP9
Development of Dual-Frequency Inductively Coupled Plasma and Control of Plasma Parameters Changing the Power Ratio between High- and Low-Frequency rf Sources
S.-H. Seo, H.-S. Lee, H.-Y. Chang, Korea Advanced Institute of Science and Technology |
PS2-TuP10
Silicon Surface Treatment of Contact Hole in Memory Device by Downstream Plasma
C.W. Kim, C.W. Lee, H.B. Seo, K.T. Kim, J.K. Yang, PSK-inc, Korea |
PS2-TuP11
The Behavior of Polymer Film Deposition during Etching the Oval Contact Holes
S.-I. Cho, Samsung Electronics Co. LTD, South Korea, S. Lim, Samsung Electronics Co. LTD, Korea, H. Baik, Samsung Advanced Institute of Technology, Korea, Y. Lee, C.-J. Kang, H. Cho, J.-T. Moon, Samsung Electronics Co. LTD, Korea |
PS2-TuP12
Empiric Study on the Effects of Two Different Film Stack Approaches on Gate Etching in Typical High-Density Plasma for Advanced Embedded Logic & Flash Systems
S. Sciarrillo, STMicroelectronics, Italy |
PS2-TuP13
A Comprehensive Characterization of the Silicon Substrate Surfaces Damaged by Plasma Processes and the Impacts on Future Scaled Devices
K. Eriguchi, K. Nakamura, M. Kamei, D. Hamada, H. Fukumoto, K. Ono, Kyoto University, Japan |
PS2-TuP15
Deposition and Characterization of SiO@sub x@N@sub y@Bottom Anti Reflective Coating (BARC)
X. Peng, Z.Y. Wang, D. Dimtrov, S. Xue, Seagate Technology |