AVS 53rd International Symposium
    Plasma Science and Technology Tuesday Sessions
       Session PS2-TuP

Paper PS2-TuP6
Study on the Plasma Damage by Spacer Oxide Etching of MOSFET Device

Tuesday, November 14, 2006, 6:00 pm, Room 3rd Floor Lobby

Session: Etching and Process Integration Poster Session
Presenter: H. Ahn, HYNIX Semiconductor Inc., Republic of Korea
Authors: H. Ahn, HYNIX Semiconductor Inc., Republic of Korea
J.S. Lee, HYNIX Semiconductor Inc., Republic of Korea
S.B. Kim, HYNIX Semiconductor Inc., Republic of Korea
K.D. Kim, HYNIX Semiconductor Inc., Republic of Korea
B.H. Lim, HYNIX Semiconductor Inc., Republic of Korea
D.G. Choi, HYNIX Semiconductor Inc., Republic of Korea
D.S. Kim, HYNIX Semiconductor Inc., Republic of Korea
Y.W. Song, HYNIX Semiconductor Inc., Republic of Korea
J.W. Kim, HYNIX Semiconductor Inc., Republic of Korea
Correspondent: Click to Email
Plasma etching is widely-used tool for the manufacturing of large scale integrated electronic device. In dry etching process, the plasma damage is able to cause dielectric breakdown or severe change of electrical properties, such as threshold voltage, breakdown voltage, and so on. Recently, the researches on these areas have been widely studied, it is well known that uniform plasma is the best solution to minimize charging effect. In this paper, the impact of plasma damage on the MOSFET during spacer oxide etching that is necessary for the formation of LDD structure MOS transistor after deposition of sidewall dielectric layer is studied. Especially, this work focused on the damage effect of on-off transient from the viewpoint of device parameter. Physical properties are characterized by Secondary Ion Mass Spectroscopy (SIMS), Transmission Electron Microscopy (TEM), Auger Electron Spectroscopy (AES) and so on. It is found that on-off transient damage is one of the most important factor to affect the PMOS device characteristics.