AVS 65th International Symposium & Exhibition
    Plasma Science and Technology Division Wednesday Sessions

Session PS+EM-WeM
Advanced Patterning

Wednesday, October 24, 2018, 8:00 am, Room 104A
Moderators: Jeffrey Shearer, IBM Research Division, Albany, NY, Yiting Zhang, KLA-Tencor


  Click here to Download program book for this session  
  in Adobe Acrobat format  

Click a paper to see the details. Presenters are shown in bold type.

8:00am PS+EM-WeM1
Study of High Selective Silicon Nitride Etching Mechanisms in Remote Plasmas: Impact of Wafer Temperature
Emilie Prevost, STMicroelectronics, France, L. Vallier, G. Cunge, LTM, Univ. Grenoble Alpes, CEA-LETI, France, C. De Buttet, CEA-LETI, France, S. Lagrasta, STMicroelectronics, France, C. Petit-Etienne, LTM, Univ. Grenoble Alpes, CEA-LETI, France
8:20am PS+EM-WeM2
Mechanism of Highly Selective SiO2 Etching over Si3N4 using a Cyclic Process with BCl3 and Fluorocarbon Gas Chemistries
Miyako Matsui, Hitachi Ltd., Japan, K. Kuwahara, Hitachi High-Technologies Corp., Japan
8:40am PS+EM-WeM3 Invited Paper
DSA Patterning for and Beyond CMOS
Patricia Pimenta Barros, CEA-LETI, France, N. Posseme, CEA, LETI, France, S. Barnola, CEA-LETI, France, R. Tiron, CEA-LETI, MINATEC, France, A. Gharbi, MA. Argoud, Z. Chalupa, M.-G. Gusmao-Cacho, CEA-LETI, France, A. Paquet, Arkema, France, F. Delachat, CEA-LETI, France, C. Nicolet, C. Navarro, Arkema, France
9:20am PS+EM-WeM5
Composition Modulation of SiGe for Si/SiGe Dual Channel Fin Application
Yohei Ishii, Hitachi High Technologies America Inc., Y.-J. Lee, National Nano Divice Laboratories, W.-F. Wu, National Nano Device Laboratories, K. Maeda, Hitachi High Technologies America Inc., H. Ishimura, Hitachi High-Technologies Taiwan Corp., M. Muira, Hitachi High-Technologies Corp.
9:40am PS+EM-WeM6
Etching Mechanisms of Si Containing Materials in Remote Plasma Source using NF3 based Gas Mixture
Erwine Pargon, V. Renaud, C. Petit-Etienne, L. Vallier, G. Tomachot, G. Cunge, O. Joubert, Univ. Grenoble Alpes, CNRS, LTM, Grenoble, France, J.-P. Barnes, N. Rochat, Univ. Grenoble Alpes, CEA, LETI, Grenoble , France
11:00am PS+EM-WeM10
Precise Control of Silicon Nitride Spacer Etching Selectively to Silicon for 3D CMOS Device
V. Ah-Leung, N. Possémé, Olivier Pollet, S. Barnola, CEA-LETI, France
11:20am PS+EM-WeM11
A Study on the Distortion of Poly Si Nano Hole Profile with High Aspect Ratio in sub X nm
Jin Won Lee, J.Y. Lee, K.J. Seong, T.S. Kwon, H.H. Jeong, S.S. Hong, D.W. Han, B.R. Lim, A.R. Ji, Y.M. Oh, J.C. Park, Samsung Electronics, Republic of Korea
11:40am PS+EM-WeM12 Invited Paper
Etching Recipe Optimization Using Machine Learning
Takeshi Ohmori, H. Nakada, M. Ishikawa, N. Kofuji, T. Usui, M. Kurihara, Hitachi, Ltd., Japan