| AVS 57th International Symposium & Exhibition | |
| Plasma Science and Technology | Monday Sessions |
Click a paper to see the details. Presenters are shown in bold type.
| 2:00pm | PS1-MoA1 Reduction of Plasma Induced Silicon-Recess During Gate Over-Etch Using Synchronous Pulsed Plasmas M. Darnon, C. Petit-Etienne, F. Boullard, E. Pargon, L. Vallier, G. Cunge, P. Bodart, M. Haass, CNRS-LTM, France, S. Banna, T. Lill, Applied Materials Inc. |
| 2:20pm | PS1-MoA2 Control of Si Damage in Dry Etch Beyond 22nm Technology Node J. Guha, C. Lee, V. Vahedi, Lam Research Corporation |
| 2:40pm | PS1-MoA3 Structural and Electrical Characterization of HBr/O2 Plasma Damage to Si Substrate M. Fukasawa, Sony Corporation, Japan, Y. Nakakubo, A. Matsuda, Y. Takao, K. Eriguchi, K. Ono, Kyoto University, Japan, M. Minami, F. Uesawa, Sony Corporation, T. Tatsumi, Sony Corporation, Japan |
| 3:40pm | PS1-MoA6 Invited Paper FEOL Etch Challenges for 2x Technology Node and Beyond C. Lee, M. Davis, V. Vahedi, Lam Research Corporation |
| 4:20pm | PS1-MoA8 Advanced Gate Patterning of Novel Multi-Gated Devices for 15nm Node and Beyond S.U. Engelmann, Y. Zhang, M.A. Guillorn, S. Bangsaruntip, N.C. Fuller, W.S. Graham, E.M. Sikorski, IBM T.J. Watson Research Center |
| 4:40pm | PS1-MoA9 Plasma Etching Challenges for Patterning Advanced Gate Stacks for 22nm Node and Beyond Y. Zhang, S.U. Engelmann, Q. Yang, R.M. Martin, E.A. Joseph, M.A. Guillorn, E.M. Sikorski, W.S. Graham, B.N. To, N.C. Fuller, IBM T.J. Watson Research Center |
| 5:00pm | PS1-MoA10 High Selectivity SiN Etching with Low Damage by RLSA Microwave Plasma M. Inoue, M. Sasaki, Y. Ohsawa, Tokyo Electron, LTD., Japan |
| 5:20pm | PS1-MoA11 Impact of Plasma and Annealing Treatments on 193nm Photoresist Line Width Roughness and Profile L. Azarnouche, STMicroelectronics, France, E. Pargon, K. Menguelti, M. Fouchier, Ltm - Umr 5129 Cnrs, France, R. Tiron, CEA-LETI-MINATEC, France, P. Gouraud, C. Verove, STMicroelectronics, France, O. Joubert, Ltm - Umr 5129 Cnrs, France |