AVS 45th International Symposium
    Manufacturing Science and Technology Group Tuesday Sessions

Session MS-TuA
Process, Integration, and Modeling

Tuesday, November 3, 1998, 2:00 pm, Room 317
Moderator: K. Aitchison, Novellus Systems


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  in Adobe Acrobat format  

Click a paper to see the details. Presenters are shown in bold type.

2:00pm MS-TuA1 Invited Paper
Pattern/Etch/Clean Process Interactions for 0.18um CMOS Gate Formation
R.J. Gale, R. Kraft, R.T. Laaksonen, A.L.P. Rotondaro, Texas Instruments
2:40pm MS-TuA3
Dual Damascene : Etching Process Characterisation of "Self Aligned" and "Counter Bore" Architectures
P. Berruyer, F. Vinet, LETI-GRESSI, France, H. Feldis, SGS-Thomson, France, E. Tabouret, Y. Trouillet, LETI-GRESSI, France, Y. Morand, SGS-Thomson, France
3:00pm MS-TuA4
Low k Polymer Etching for Dual Damascene Technology Application to SILK Material
F. Vinet, E. Tabouret, LETI-GRESSI, France, Ch. Vivensang, Tokyo Electron Europe LTD, France
3:20pm MS-TuA5 Invited Paper
Manufacturing Issues for MEMS Production
K.W. Markus, MCNC
4:00pm MS-TuA7
Design of a 300 mm CVD Tungsten Reactor using Computational Fluid Dynamics
E.J. McInerney, T.M. Pratt, A. Tahari, Novellus Systems
4:20pm MS-TuA8
Computational Flow Modeling for Electrostatic Chuck Applications
L.A. Gochberg, Novellus Systems, Inc.
4:40pm MS-TuA9
TEOS CVD Topography Simulation Using Surface CHEMKIN and EVOLVE
A.H. Labun, Digital Equipment Corporation, T.S. Cale, Rensselaer Polytechnic Institute, P. Ho, H.K. Moffat, M.E. Coltrin, Sandia National Laboratories
5:00pm MS-TuA10
Plasma-Induced Nitridation of the Gate Oxide Dielectrics: Linked Equipment-Feature-Atomic Scale Simulations
V. Sukharev, S. Aronowitz, H. Puchner, V. Zubkov, J. Haywood, J. Kimball, LSI Logic Corporation