| AVS 57th International Symposium & Exhibition | |
| Plasma Science and Technology | Wednesday Sessions |
Click a paper to see the details. Presenters are shown in bold type.
| 8:00am | PS+MN-WeM1 High Etch Rate of TSV using by Ultra Self-Confined VHF-CCP Y. Morikawa, M. Yoshii, N. Mizutani, K. Suu, ULVAC, Inc., Japan |
| 8:20am | PS+MN-WeM2 Very Uniform and High Rate TSV Etching Process in Advanced NLD Plasma Y. Morikawa, T. Murayama, K. Suu, ULVAC, Inc., Japan |
| 8:40am | PS+MN-WeM3 Deep Reactive Ion Etch Process Optimization for Control of Sidewall Profile and Morphology as a Function of Aspect Ratio R.J. Shul, R.L. Jarecki, T.M. Bauer, Sandia National Laboratories, M. Wiwi, LMATA Government Services |
| 9:00am | PS+MN-WeM4 XeF2 Vapor Phase Silicon Etch used in the Fabrication of Movable SOI Structures J. Stevens, R.J. Shul, Sandia National Laboratories, M. Wiwi, C.L. Ford, LMATA Government Services, T. Plut, T.M. Bauer, Sandia National Laboratories |
| 9:20am | PS+MN-WeM5 SF6/O2/HBr Plasma Processes for the Etching of High Aspect Ratio through Silicon Via S. Avertin, STMicroelectronics, France, E. Pargon, T. Chevolleau, Ltm - Umr 5129 Cnrs, France, F. Leverd, P. Gouraud, C. Verove, STMicroelectronics, France, O. Joubert, Ltm - Umr 5129 Cnrs, France |
| 10:40am | PS+MN-WeM9 Key Challenges in Extremely High-Aspect- Ratio Dielectrics Etching at 3x nm DRAM and Beyond S.K. Lee, J.-H. Sun, S.O. Lee, J.-S. Bang, S.-I. Lee, C.-M. Lim, S.-Y. Kim, D.-G. Lim, S.-K. Park, J.-G. Jung, HYNIX Semiconductor Inc., Republic of Korea |
| 11:00am | PS+MN-WeM10 Microstructures Etching on Silicon with the STiGer Process T. Tillocher, GREMI, France, J. Ladroue, GREMI - STMicroelectronics, France, F. Moro, G. Gommé, P. Lefaucheux, GREMI, France, M. Boufnichel, STMicroelectronics, France, P. Ranson, R. Dussart, GREMI, France |