AVS 56th International Symposium & Exhibition
    Plasma Science and Technology Tuesday Sessions

Session PS1-TuM
Advanced FEOL and BEOL Etch

Tuesday, November 10, 2009, 8:00 am, Room A1
Moderator: Y. Kimura, LAM Research


  Click here to Download program book for this session  
  in Adobe Acrobat format  

Click a paper to see the details. Presenters are shown in bold type.

8:00am PS1-TuM1 Invited Paper
Inductively-Coupled Pulsed Plasmas in the Presence of Synchronous Pulsed Substrate Bias for Advanced Gate Etching
S. Banna, Applied Materials Inc., K. Tokashiki, Samsung Elect. Co. Ltd., A. Agarwal, Applied Materials Inc., J.Y. Lee, Samsung Elect. Co. Ltd., V. Todorow, Applied Materials Inc., J.H. Yoon, Samsung Elect. Co. Ltd., S. Rauf, Applied Materials Inc., K. Shin, Samsung Elect. Co. Ltd., K. Ramaswamy, P.J. Stout, D. Lymberopoulos, K. Collins, Applied Materials Inc.
8:40am PS1-TuM3
Synchronously Pulsed Capacitively Coupled Plasma Sources for Dielectric Etching
A. Agarwal, P.J. Stout, S. Rauf, K. Collins, Applied Materials Inc.
9:00am PS1-TuM4
Highly Selective and Low Damage Etching of TiN / HfO2 Layer Gate Stack Structure using Neutral Beam Etching and Atomic Layer Etching
B.J. Park, J.B. Park, TH. Min, J.K. Yeon, S.K. Kang, W.S. Lim, G.Y. Yeom, SungKyunKwan University, South Korea, K.S. Min, University of Texas, Austin
9:20am PS1-TuM5
Impact of Cure and Trim Processes on the Linewidth Roughness Transfer during Gate Stack Patterning with Amorphous Carbon Mask
L. Azarnouche, STMicroelectronics, France, E. Pargon, M. Martin, O. Luere, K. Menguelti, CNRS/LTM, France, P. Gouraud, C. Verove, STMicroelectronics, France, O. Joubert, CNRS/LTM, France
9:40am PS1-TuM6
Multilayer Mask Etch - CD, CD Bias, and Profile Control using RLSA Plasma Etcher
H. Kintaka, T. Mori, TEL Technology Center, America, LLC USA, M. Sasaki, T. Nozawa, Tokyo Electron Technology Development Institute, Inc. Japan
10:40am PS1-TuM9
Effects of Hydrogen Bombardment during Polysilicon Gate Etching by HBr/O2 Plasmas
T. Ito, K. Karahashi, Osaka University, Japan, M. Fukasawa, S. Kobayashi, N. Kuboi, T. Tatsumi, Sony Corporation, S. Hamaguchi, Osaka University, Japan
11:00am PS1-TuM10
Challenges in Etching sub-45nm Shallow Trench Isolation (STI)
A. Paterson, T. Panagopoulos, S. Sriraman, A. Sato, N. Benjamin, N. Williams, C. Lee, Y. Yamaguchi-Adams, A. Eppler, L. Braly, T. Kim, H. Singh, V. Vahedi, Lam Research
11:20am PS1-TuM11
Control of TiN Sheet Resistance in Downstream Plasma PR Strip
V. Vaniapura, L. Diao, S. Xu, Mattson Technology, Inc.
11:40am PS1-TuM12
Inductively Coupled Plasma Etching of GaN and Induced Defects
J. Ladroue, GREMI - STMicroelectronics, France, A. Meritan, M. Boufnichel, STMicroelectronics, France, P. Lefaucheux, P. Ranson, R. Dussart, GREMI, France