AVS 53rd International Symposium
    Plasma Science and Technology Monday Sessions
       Session PS2-MoM

Paper PS2-MoM3
Understanding the Impact of Chamber Walls during Plasma Etching: a Key to Control Plasma Processes In ULSI

Monday, November 13, 2006, 8:40 am, Room 2011

Session: Advanced Gate Fabrication
Presenter: R. Ramos, Freescale Semiconductor, France
Authors: R. Ramos, Freescale Semiconductor, France
G. Cunge, Laboratoire des Technologies de la Microelectronique, CNRS-LTM, France
O. Joubert, Laboratoire des Technologies de la Microelectronique, CNRS-LTM, France
M. Orlowski, Freescale Semiconductor, France
T. Lill, Applied Materials
Correspondent: Click to Email
Decrease in device dimension for integrated circuit manufacturing is challenged by wafer-to-wafer repeatability during plasma etching processes. Today's strategy to minimize potential drifts during plasma processes is to dry-clean the walls of the plasma chamber with an appropriate chemistry between each wafer to efficiently remove the etch products that have been deposited during the etch process. By using a simple technique that can monitor the chamber walls coating (based on X-ray Photoelectron Spectroscopy analyses) we have investigated the deposits formed on the chamber walls after metal / high-k (TiN, TaN, TaC, WSi@sub x@, HfO@sub 2@) gate etching processes, and the associated reactor cleaning strategies. We show that, in the most typical etch and clean processes, chamber walls are inevitably exposed to F-based plasma leading to the formation of AlF@sub x@ residues on the Al@sub 2@O@sub 3@ chamber walls. Sputtering of F atoms and AlF@sub x@ particles from this fluoride layer during the etching process then leads to uncontrolled concentrations of fluorine-based species and metal particles in the plasma gas phase that have an impact on the reliability of the process. We thus have investigated two potential solutions to overcome this issue without changing chamber walls material (for expensive Y@sub 2@O@sub 3@ liners for example): (1) dry-cleaning of AlF@sub x@ residues between each wafer, and (2) protecting the inner parts of the chamber walls with a thin coating before processing any wafer to provide a F-free, reproducible chamber environment. By comparing SiOCl coatings and carbon-rich coatings, we conclude that the latter ensures both better reproducibility and longer chamber walls lifetime, since reactor walls are never exposed to fluorine-based plasmas, therefore preventing AlF formation. Furthermore TEM picture shows that carbon-coated walls exhibit excellent capabilities for advanced gate stack patterning.