AVS 53rd International Symposium
    Plasma Science and Technology Monday Sessions
       Session PS2-MoM

Paper PS2-MoM2
Effect of Photoresist Trimming and Plasma Treatments on Line Roughness, Necking, and Bending During High Density Plasma Polysilicon Gate Etching

Monday, November 13, 2006, 8:20 am, Room 2011

Session: Advanced Gate Fabrication
Presenter: S.A. Vitale, Texas Instruments
Authors: S.A. Vitale, Texas Instruments
B.A. Smith, Texas Instruments
J.W. Blatchford, Texas Instruments
B.M. Rathsack, Texas Instruments
Correspondent: Click to Email
Control of the polysilicon gate electrode length during high density plasma etching is one of the most challenging aspects of transistor fabrication at the 45nm technology node. According to the 2005 International Technology Roadmap for Semiconductors, the polysilicon gate length will be as small as 23nm for high performance microprocessors by 2008. Although transistor gate length has been shrinking by approximately 0.7x every 2 years, the line edge roughness has not scaled by the same factor. As a result, line edge roughness now can be as high as 25% of the gate length, resulting in severe degradation of transistor performance. In addition, systematic variations such as line necking and bending can result in line breakage and ultimately failure of the device. Solutions to reduce polysilicon gate line edge roughness, necking, and bending are critical to enable transistor performance and process yield at the 45nm node. In this work, high frequency line edge roughness of etched polysilicon gates is shown to originate primarily from roughness in the incoming photoresist. Plasma treatment to reduce the gate linewidth, commonly called plasma resist trimming, is shown to reduce the high frequency edge roughness. Line necking and bending, on the other hand, increases during the plasma resist trimming. AFM analysis of photoresist lines shows that torquing stresses during plasma resist trim is a primary factor in polysilicon gate bending and breakage. In general, high frequency line edge roughness is shown to be uncorrelated between the left and right edges of the lines. The effect of resist trimming and plasma treatments on the frequency spectrum of the roughness is also presented. HBr plasma curing, which can be used to harden photoresist and improve selectivity during polysilicon etch, is shown to neither improve nor degrade line edge roughness. Increasing oxygen concentration during the plasma resist trim step can be used to reduce line necking, at a given gate linewidth.