In the current development of the 65nm node, various technical approaches regarding doping processes have been evaluated to fulfill the technology requirements of poly-gate doping, ultra-shallow junctions, channel and isolation architectures and deep gradual junctions. Low thermal budget processes (solid-phase epitaxy), advanced ion implantation processes (Plasma Doping), advanced activation processes (flash or laser annealing), stressed SiGe junctions, Poly-SiGe gate, offset spacers, 0° tilt wells implants, antimony implants, etc. are some examples of processes that are evaluated by ICMs for the 65nm node. In this paper, we propose to make a review and to discuss each technique to highlight their specific benefits and drawbacks for the manufacturing of a planar 65nm technology platform. Based on this status and on the basic requirements of the 45nm node, we build different scenarios about the major technological or architectural breaks that will emerge. Then, such projections are discussed in term of future technical challenges for the ion implantation and activation processes.