AVS 49th International Symposium
    Microelectromechanical Systems (MEMS) Thursday Sessions
       Session MM-ThA

Paper MM-ThA6
MEMS-based Gray-scale Technology

Thursday, November 7, 2002, 3:40 pm, Room C-210

Session: Fabrication, Integration, and Packaging Techniques for MEMS
Presenter: C.M. Waits, University of Maryland
Authors: C.M. Waits, University of Maryland
A. Modafe, University of Maryland
R. Ghodssi, University of Maryland
Correspondent: Click to Email
Micro-electro-mechanical systems (MEMS) fabrication technologies originated directly from integrated circuit (IC) fabrication, consisting of primarily planar techniques. Consequently, structures fabricated for MEMS devices have been traditionally designed with nominally vertical sidewalls (dry anisotropic etching), undercut sidewalls (wet isotropic etching), or sidewalls with limited angles due to the crystallographic orientation of the substrate (wet anisotropic etching). There exists a breadth of potential applications for a fabrication technique that can achieve 3-D structures (arbitrarily sloped sidewalls) in silicon suited for small and large high aspect ratio MEMS structures. A micromachining technique using gray-scale lithography along with dry anisotropic etching enables the development of 3-D structures in silicon. The gray-scale lithography allows the fabrication of a differential-height photoresist-masking layer. The key components in gray-scale lithography include (a) design of the optical mask and (b) use of a projection lithography system. A sub-resolution optical mask and a photolithography stepper system together locally modulate the intensity of ultraviolet light through diffraction. The modulated light exposes a photoresist film to specified depths where a gradient height profile remains once developed. This method results in the fabrication of differential-height photoresist masking layers with up to 22 different height levels. The masking layers are then used in Reactive Ion Etching (RIE) to successfully transfer the structures in silicon, resulting in various shaped 9-micron tall silicon structures with sloped sidewalls ranging from 5 to 90 degrees with respect to the silicon surface. The results of preliminary characterization for both gray-scale lithography and RIE etching in silicon are presented.