AVS 47th International Symposium
    Plasma Science and Technology Wednesday Sessions
       Session PS+MS-WeM

Paper PS+MS-WeM1
Plasma-Induced Charging Gate Oxide Pinhole Formation

Wednesday, October 4, 2000, 8:20 am, Room 311

Session: Plasma-Induced Damage
Presenter: T.C. Ang, Chartered Semiconductor Manufacturing, Singapore
Authors: T.C. Ang, Chartered Semiconductor Manufacturing, Singapore
S.Y. Loong, Chartered Semiconductor Manufacturing, Singapore
P.I. Ong, Chartered Semiconductor Manufacturing, Singapore
W.B. Loh, Chartered Semiconductor Manufacturing, Singapore
Y.W. Teh, Nanyang Technological University, Singapore
Correspondent: Click to Email
Plasma process induced charging damage to gate oxide is a growing concern in ULSI MOS device fabrication. This is due to gate oxide thinning resulting from continuous CMOS downsizing and increasing use of high density plasma (HDP) tools. In this paper, we study the extent of the plasma induced damage resulting from HDP inter-metal dielectric deposition process in 0.18um transistor technology. Gate oxide pinhole formation resulting from plasma induced charging damage was observed above a threshold ion density. Transistor test structures with different types of antennas and antenna ratios were used to monitor the plasma damage. The extent of the plasma charging damage was evaluated through shift in gate leakage, threshold voltage and transconductance from a reference transistor with no antenna attached. Each of these parameters were measured for a large number of transistors in order to statistically assess the level of plasma based gate oxide damage. Gate oxide pinhole formation was observed in transistors with antenna ratios above a certain value. The pinholes were caused by localized breakthrough of the gate oxide resulting from charge imbalance in the plasma and are only present when the charge imbalance exceeds a threshold value. Based on our results, we have determined the threshold value for charge imbalance and ion density to cause gate oxide pinhole formation. We have also developed a novel integration scheme which is effective in reducing the charging damage from the high density plasma process significantly and no gate oxide pinholes were observed with the implementation of this scheme.