Paper PS-WeM2
Direct Metal Etch Evaluation for Advanced Interconnect

Wednesday, November 1, 2017, 8:20 am, Room 23

For many decades, the semiconductor industry could follow Moore’s law by introducing innovative device architectures, smart design, new integration and patterning concepts, better tools and new materials. While industry is almost ready for high volume manufacturing of the 7nm technology node, new approaches are constantly being tested by research centers to enable further scaling down to the 5nm and 3nm technology nodes targeting respectively a metal pitch of about 32nm and 21nm. At such aggressive pitches, the effective resistivity of damascene Cu wires increases drastically due to both surface and grain boundary scattering but also due to the need of a Cu diffusion barrier that can’t be scaled down. Besides the resistivity aspect, low-k damages induced by both plasma processing and barrier deposition contribute to the low reliability performance of damascene Cu interconnects.

In this context, alternative integration schemes exploiting direct metal etch technology and alternative metals like Ru have gained interest. A semi-damascene flow for instance can advantageously be used to overcome the aforementioned challenges. It consists of opening the vias into the low-k layer and filling them with a blanket metal deposition; connection are then created into the metal layer through direct etch. The empty trenches are finally either filled with low-k or used in an air gap configuration. This concept shows many advantages: it is suitable for a barrier-less integration, it prevents low-k damage and it allows for larger metal grain size. Regarding material selection, Cu is not a viable option considering the well-known difficulties in reactive dry Cu patterning. Ru is chosen as an alternative thanks to the ease with which it can be patterned using a conventional RIE process. Moreover, Ru line resistance is expected to go below Cu line resistance at CD below ~13nm, considering a line aspect ratio of 2. A further decrease in resistance can be expected with an increase in the Ru line aspect ratio.

In this work, we study the integration of Ru as a material for interconnect wires using a semi-damascene flow. Ru lines at 32nm pitch and with an aspect ratio of at least 2 are patterned using direct RIE targeting lines of 16nm and exploring a scaling extension down to 12nm. We will compare the electrical performances of Ru lines made from 3 different integration schemes. In one case, the patterns will be obtained using EUV single print lithography and in the other two cases, a 193i lithography will be employed defining the metal lines either from the spacers in the Anti Spacer Quadruple Patterning (ASQP) approach or from the tone inverted trenches in the SAQP approach.