Paper TF-ThP8
Dual-temperature Atomic Layer Deposition of HfO₂/Al₂O₃ on In_0.53Ga_0.47As

Thursday, October 24, 2019, 6:30 pm, Room Union Station B

In_1-xGa_xAs has been considered to be one of the promising candidates for future n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) [1]. However, due to its poor interface quality with the high-k gate dielectrics (e.g., high interface state density, D_it), Al₂O₃ has been used preferably as an interface passivation layer under the HfO₂ gate dielectric with a higher k value [2-5]. Most recently, Choi et al. [6] reported that low-temperature atomic layer deposition (ALD) of a HfO₂ (4 nm)/Al₂O₃ (1 nm) stacked structure at 100 °C was effective in reducing both D_it and leakage current density. However, because they used an identical ALD temperature for both HfO₂ and Al₂O₃ layers, the capacitance equivalent thickness (CET) of the HfO₂/Al₂O₃ gate dielectric stack was significantly increased [6].

In this presentation, we will introduce a dual-temperature ALD process for the HfO₂/Al₂O₃ stacked gate dielectric to decrease the CET values while maintaining low D_it and leakage current density values. While the ALD temperature for the Al₂O₃ passivation layer (~1 nm) on a n-type In_0.53Ga_0.47As substrate was fixed at 100 °C, the following ALD temperature for the HfO₂ layer (~4 nm) was varied from 100 to 300 °C to decrease the CET values. After the fabrication of MOS capacitors with a stacked gate dielectric structure, the effects of the ALD temperature for the overlaid HfO₂ film on various electrical parameters and characteristics, such as CET, D_it, bulk trap density, and static/dynamic leakage currents, were studied.

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