AVS 66th International Symposium & Exhibition
    Plasma Science and Technology Division Tuesday Sessions
       Session PS-TuP

Paper PS-TuP10
Effects of Bias on Quasi-Atomic Layer Etching of Silicon Dioxide by Cyclic Ar/C4F8/O2 and Ar Plasmas

Tuesday, October 22, 2019, 6:30 pm, Room Union Station B

Session: Plasma Science and Technology Poster Session
Presenter: Xifeng Wang, University of Michigan
Authors: X. Wang, University of Michigan
M. Wang, TEL Technology Center, America, LLC
A. Mosden, TEL Technology Center, America, LLC
P.E. Biolsi, TEL Technology Center, America, LLC
M.J. Kushner, University of Michigan
Correspondent: Click to Email

With the reduction in feature size in microelectronics fabrication, the process flow in plasma etching includes several steps that are devoted to producing the mask that is ultimately used to define the semiconductor (or dielectric) critical dimension (CD). These processes include tight pitch/space and multi-layer structures composed of several materials which, in turn, require a sequence of recipes steps to etch. In this regard, atomic layer etching (ALE) is being employed in several steps of the process flow to improve CD tunability and resist selectivity.

In this work, we report on a computational investigation of the ALE plasma etching of dielectric (silicon dioxide) layers in multi-layer structures using a cyclic fluorocarbon mixture deposition and Ar etching process. Reactor scale modeling was performed using the Hybrid Plasma Equipment Model (HPEM) and feature scale modeling was performed by Monte Carlo Feature Profile Model (MCFPM). The first step in the process largely deposits fluorocarbon polymer. The second step activates the etch. The reactor is a multi-frequency capacitively coupled plasma (CCP) augmented by a DC bias to the top electrode. During the deposition step where ion energies should be low, 40 MHz source power is applied to the bottom electrode and a 900 V negative DC bias is applied to the top electrode. For the etch step where moderately energetic ions are desired, only a 10 MHz bias is applied to the bottom electrode.

During the deposition step, ion energies to the wafer are typically lower than 40 eV. These low energy ions activate surface sites (but typically do not sputter), which then enables deposition of a controllable thickness of polymer. During the etch step, the flux of Ar+ at the surface is at about 1.4 1015 cm-2s-1, when then requires several to ten of seconds to remove a monolayer or several monolayers of dielectric. Since the layers being removed are at the bottom of a high-aspect-ratio feature, it is desirable to narrow the angular distribution of the ions by increasing bias power which then also increases ion energy. The narrower distribution works towards maintaining the CD, however the higher ion energy works against maintaining the quasi-ALE character of the etch. Tradeoffs between simultaneously maintaining CD and quasi-ALE performance will be discussed .

* Work supported by Tokyo Electron Ltd. and the US Department of Energy Office of Fusion Energy Science.