AVS 66th International Symposium & Exhibition
    Plasma Science and Technology Division Monday Sessions
       Session PS+AS+EM+SS+TF-MoA

Invited Paper PS+AS+EM+SS+TF-MoA3
Understanding Atomic Layer Etching: Thermodynamics, Kinetics and Surface Chemistry

Monday, October 21, 2019, 2:20 pm, Room B130

Session: Plasma-Surface Interactions
Presenter: Jane P. Chang, University of California, Los Angeles
Correspondent: Click to Email

The introduction of new and functionally improved materials into silicon based integrated circuits is a major driver to enable the continued down-scaling of circuit density and performance enhancement in analog, logic, and memory devices. The top-down plasma enhanced reactive ion etching has enabled the advances in integrated circuits over the past five decades; however, as more etch-resistive materials are being introduced into these devices with more complex structures and smaller features, atomic level control and precision is needed in selective removal of these materials. These challenges point to the growing needs of identifying and developing viable etch chemicals and processes that are more effective in patterning complex materials and material systems such as multiferroics, magnetic materials and phase change materials, with tailored anisotropy and selectivity.

In this talk, a universal chemical approach is presented, combining thermodynamic assessment and kinetic validation to identify and validate the efficacy of various plasma chemistries. Specifically, potential reactions between the dominant vapor phase/condensed species at the surface are considered at various temperatures and reactant partial pressures. The volatility of etch product was determined to aid the selection of viable etch chemistry leading to improved etch rate of reactive ion etching process. Based on the thermodynamic screening, viable chemistries are tested experimentally to corroborate the theoretical prediction. Some of the above mentioned material systems such as complex oxides and metallic material systems used in logic and memory devices are used as examples to demonstrate the broad applicability of this approach.