AVS 65th International Symposium & Exhibition
    Plasma Science and Technology Division Thursday Sessions
       Session PS+EM+TF-ThA

Invited Paper PS+EM+TF-ThA10
Selective Processing to Enable High Fidelity Control for the 5 nm Node

Thursday, October 25, 2018, 5:20 pm, Room 104C

Session: Atomic Layer Processing: Integration of ALD and ALE
Presenter: Benjamen Rathsack, Tokyo Electron America, Inc.
Authors: B. Rathsack, Tokyo Electron America, Inc.
A. Ranjan, TEL Technology Center, America, LLC.
P.L.G. Ventzek, Tokyo Electron America, Inc.
H. Mochiki, Tokyo Electron Miyagi, Ltd., Japan
J. Bannister, Tokyo Electron America, Inc.
Correspondent: Click to Email
Selective processing through the integration of Etch and ALD is critical to enable high fidelity control for 5 nm node structures. The complexity of multi-step integrations and processes has caused edge placement error (EPE) to become a critical challenge. The enablement of further scaling requires the utilization of self-aligned processing to address overlay variation as well as highly selective processing to address localized fidelity control. Fidelity control has become complex on multi-step processes integrated for SAQP, self-aligned block (multi-color) and high-aspect ratio structures. Localized fidelity control is highly dependent on both the material stacks and selective processing capabilities. This includes stringent selectivity, profile, loading and uniformity requirements. To meet these requirements, the fusion of Etch and ALD enables atomic level precision with minimal impact from CD loading effects. The fusion of Etch and ALD processing also improves across wafer CD control and LWR. The use of selective processing is demonstrated to be a key enabler of 5 nm node fidelity control.