Paper PS-MoM11
Damage Free Plasma Etching Processes for the Patterning of InGaAs fin for the sub-10nm Technological Node

Monday, November 7, 2016, 11:40 am, Room 104B

The conventional Si CMOS technology recently encounters difficulties to maintain its dimensional scaling owing to the high power consumption of logic chips. The planar MOSFET has already evolved to a FinFET, a three dimensional device architecture which provides lower leakage current. New channel materials are now therefore considered to continue the transistor scaling and enable higher device densities with faster logic switching and lower power consumption. The III-V semiconductors which present electron velocities ten times higher than the silicon, are seriously considered as N-channel materials in a FinFET architecture for the sub-10nm technological node. To complete this integration, the development of plasma etching processes dedicated to the III-V fin patterning is necessary. The major challenge for nanometer-scale III-V finFET definition by plasma etching is the realization of vertical sidewalls with a high quality surface.

In this work, we address this challenge by undertaking a systematic investigation of dry etch processing for InGaAs fin formation, with the aim of obtaining high resolution fins with vertical sidewalls and clean etch surfaces. The InGaAs layers have been grown by MOCVD on 200mm Si wafer and photoresist lines with dimensions ranging from 20 to 100nm have been patterned by ebeam lithography. The plasma etching experiments are carried out on a 200mm etching platform from AMAT composed of two inductive coupled plasma reactors, whose one is equipped with a hot cathode. The performance of Cl₂ and CH₄ based plasma processes at 50°C and 200°C have been evaluated and compared in terms of anisotropy, surface roughness and plasma induced chemical damages. A particular attention is paid on the chemical and physical damages induced on the pattern sidewalls. The pattern profiles are characterized by electron microscopies. The sidewalls roughness is measured by AFM using a homemade setup where the sample is tilted to allow the tip to scan the sidewalls. The sidewalls chemical composition and stoichiometry after etching is analyzed by nanoauger spectroscopy. We also investigate restoring processes to mitigate the etch-induced sidewalls damages by combining oxidation and wet removal steps. Finally, we propose a new method to pattern the III-V fins without generating etching damages. It consists of a two-step process, starting with a surface modification by a He or H₂ plasma implantation followed by a wet cleaning to remove the modified surface without damaging the non-modified one. This method appears promising to etch the III-V fin without damaging the fin sidewalls and will be benchmarked to conventional plasma technique.