AVS 60th International Symposium and Exhibition
    Plasma Science and Technology Wednesday Sessions
       Session PS-WeA

Invited Paper PS-WeA11
Plasma Surface Interactions and How They Limit Semiconductor Plasma Processing

Wednesday, October 30, 2013, 5:20 pm, Room 104 C

Session: PSTD at AVS60: Looking Back and Moving Forward
Presenter: R.A. Gottscho, Lam Research Corp
Authors: R.A. Gottscho, Lam Research Corp
K.J. Kanarik, Lam Research Corp
S. Sriraman, Lam Research Corp
Correspondent: Click to Email
Semiconductor growth continues at a brisk pace, driven by consumer electronics. Meanwhile, t he semiconductor industry is evolving and facing unprecedented technology and economic hurdles. Limits imposed by planar technology and a stalled lithographic roadmap threaten to slow down the rate at which density, cost, and speed improvements can be made. More intricate device designs hold the promise of extending Moore’s Law, but they increasingly rely on high-precision plasma processes of deposition and etching. This means that deposited films must be conformal and atomically smooth; and formation of the FinFET structure requires atomic-scale etch precision across not only the wafer but also from wafer to wafer and fab to fab. Precision process solutions are already known but making them cost-effective is difficult as they are prone to inefficiencies in plasma surface interactions. In this paper, we will review fundamental plasma surface interactions such as the kinetics and dynamics of transport, adsorption, and desorption. These interactions will be discussed in relation to the performance of processing equipment, and how the resulting limitations can be overcome with clever process solutions.