Electrically active defects that either trap carriers or act as centers of fixed charge are critically important in MOS devices. Their effects are particularly pronounced for arsenide-based semiconductors intended for NMOS devices because of 1) the relative ease of forming surface defects on these crystals, 2) the lack of an insulating native oxide (such a SiO2) to inhibit tunneling of electrons from the substrate into near-interface defects in deposited gate dielectrics, and 3) the low density of states in the conduction band of the semiconductor that enhances the effect of charge traps on the measured capacitance compared to materials such as Si or Ge. Alloying GaAs with InAs reduces the band gap of the former by lowering the energy of the conduction band edge, reducing the overall density of defect states in the band gap and thus the density of interface traps. Further reduction in both bulk dielectric defect densities (e.g. border traps and fixed charge) and interface trap densities can be achieved by appropriate pre-dielectric and post-dielectric processes. This presentation will review recent results on pre-atomic layer deposition defect passivation, including trimethyl aluminum and oxidant pre-dosing of initially clean and oxide-free InGaAs (100) surfaces, plasma treatments of initially air-exposed surfaces, and post-dielectric defect passivation using hydrogen. Reliable interface trap density measurements that combine capacitance-voltage and conductance-voltage analysis indicate trends in interface trap density across the band gap (down to ~ 1012 cm-2eV-1 near midgap) and in border trap density as a function of the different passivation treatments. Results obtained from MOS capacitors fabricated on As2-decapped InGaAs (100) substrates are compared with reported density functional theory predictions and scanning probe measurements of InGaAs surface defect passivation.