| AVS 59th Annual International Symposium and Exhibition | |
| Plasma Science and Technology | Thursday Sessions |
| Session PS1-ThM |
| Session: | Plasma Processing for Disruptive Technologies (NVM, TSV, etc.) |
| Presenter: | H. Miyazoe, IBM T.J. Watson Research Center |
| Authors: | H. Miyazoe, IBM T.J. Watson Research Center S. Engelmann, IBM T.J. Watson Research Center H. Tsai, IBM T.J. Watson Research Center M. Brink, IBM T.J. Watson Research Center B.N. To, IBM T.J. Watson Research Center J. Cheng, IBM Research - Almaden C. Liu, IBM Research - Almaden W.S. Graham, IBM T.J. Watson Research Center E.M. Sikorski, IBM T.J. Watson Research Center M.A. Guillorn, IBM T.J. Watson Research Center N.C.M. Fuller, IBM T.J. Watson Research Center E.A. Joseph, IBM T.J. Watson Research Center |
| Correspondent: | Click to Email |
As the feature size in CMOS technology continues to shrink, patterning below 40 nm pitch faces many challenges. Continued delays in production worthy EUV lithography has driven an interest in directed self-assembly (DSA) [1] and sidewall image transfer (SIT) [2] patterning. Both techniques can augment conventional lithographic patterning by providing sublithographic multiplication of feature pitch. In this work, we leverage the results of a parametric study of factors impacting fine feature patterning [3] to further optimize DSA and SIT based patterning in the sub 30 nm pitch regime. Recently, we successfully demonstrated the transfer of “fingerprint” DSA patterns to the materials typically used in front end of line (FEOL) processing. Patterning of Si, SiNx and SiOx at a ~28 nm feature pitch using poly(styrene-block-methyl methacrylate) (PS-b-PMMA) block copolymers was shown [4]. In this work, we discuss further optimization of the etch processes used to pattern the organic underlayer in the masking material stack as well as the substrate material. The use of templated DSA to generate line-space structures in the aforementioned materials was used to investigate the control of critical dimension (CD), line edge roughness and line width roughness throughout the patterning process. SIT-based patterning using metal oxide or nitride films as the side-wall hard mask was used to generate patterns in FEOL materials down to ~25 nm pitch. Typically, the CD of end lines are larger than the target CD of nested lines in structures generated by SIT. Dense/iso loading-like effects and other mechanisms to explain this phenomenon are explored. These initial patterning studies may play an important role in understanding feature formation and density limiting ground rules in future technology nodes. This work is sponsored by the DARPA GRATE (Gratings of Regular Arrays and Trim Exposures) program under Air Force Research Laboratory (AFRL) contract FA8650-10-C-7038.
[1] J. Cheng et al., SPIE 2010. [2] H. Yaegashi et al., SPIE 2012. [3] H. Miyazoe et al., AVS2011. [4] S. Engelmann et al., SPIE 2012.