| AVS 59th Annual International Symposium and Exhibition | |
| Plasma Science and Technology | Monday Sessions |
| Session PS-MoM |
| Session: | Advanced FEOL/Gate Etching 1 |
| Presenter: | D. Nakayama, Tohoku University, Japan |
| Authors: | D. Nakayama, Tohoku University, Japan A. Wada, Tohoku University, Japan T. Kubota, Tohoku University, Japan M. Haass, IBM TJ Watson Research Center R.L. Bruce, IBM TJ Watson Research Center R.M. Martin, IBM TJ Watson Research Center N.C.M. Fuller, IBM TJ Watson Research Center S. Samukawa, Tohoku University, Japan |
| Correspondent: | Click to Email |
Silicon nitride is used as a gate sidewall spacer for aggressively scaled complementary metal-oxide-semiconductor (CMOS) devices because of their high thermal stability and excellent insulating property. Therefore, silicon nitride (Si3N4) etching (patterning) is one of the critical processes in sub-22-nm-CMOS device fabrication. During the patterning of the silicon nitride spacer film, damage to the Si surface typically occurs, resulting in silicon (Si) and Si dioxide (SiO2) recess in the source/drain and shallow trench isolation (STI) respective regions. Additionally, loss of spacer film close to the top of the gate structure can occur during the excessive “over etch” necessary to enable a manufacturable process. The advent of non-planar device geometries only exacerbates the aforementioned challenges. Hence, extremely high selectivity of silicon nitride to both Si and SiO2 is extremely critical.
We developed an alternative etching process to solve these problems using a “damage-free” neutral beam (NB) etching process. A typical NB apparatus consists of plasma and process chambers that are separated by a carbon aperture. The carbon aperture can effectively neutralize the charged particles and eliminate irradiation of UV photons from plasma when the plasma passes through it. Therefore, etching can proceed without any UV-induced damage caused by charged particles or high-energy photons from the plasma.
In this study, we proposed neutral beam etching using a new gas chemistry of CF3I in addition with oxygen (O2) and hydrogen (H2) gases for the sidewall spacer etching process. By using CF3I, we can ensure that an energetic neutral beam comprised primarily of CF3 is generated and, as such, becomes the main etching species for Si3N4,during the patterning process. Additionally, surface polymerization and surface oxidation on SiO2 and poly-Si can be precisely controlled by addition of O2 and H2 gases, respectively. As a result, moderately high selectivity of Si3N4 to both of Si (6.2:1) and SiO2 (18.6:1) could be achieved by optimizing the ratio of CF3I/O2/H2. Additionally, on relaxed ground rule structures at ~ 240nm pitch and gate CD (Lgate) ~ 40nm, an optimized NB etching condition achieves complete removal of the spacer from the gate sidewall with negligible spacer loss at the top of the gate structure and < 2 nm SOI loss. These results demonstrate the potential of silicon nitride etching process using neutral beams for fabricating sub-22-nm gate sidewall spacers.