| AVS 57th International Symposium & Exhibition | |
| Electronic Materials and Processing | Wednesday Sessions |
Click a paper to see the details. Presenters are shown in bold type.
| 2:00pm | EM+SS-WeA1 Invited Paper High-k III-V MOSFETs Enabled by Atomic Layer Deposition P. Ye, Purdue University |
| 2:40pm | EM+SS-WeA3 Passivation of Al2O3/InGaAs(100) Interfaces by Atomic Layer Deposition and Annealing F.L. Lie, B. Imangholi, University of Arizona, W. Rachmady, Intel Corp., A.J. Muscat, University of Arizona |
| 3:00pm | EM+SS-WeA4 An In Situ Examination of Atomic Layer Deposited Al2O3/InAs(100) Interfaces A.P. Kirk, M. Milojevic, D.M. Zhernokletov, J. Kim, R.M. Wallace, University of Texas, Dallas |
| 4:00pm | EM+SS-WeA7 Fermi-level Unpinning of HfO2/In0.53Ga0.47As Gate Stacks using Hydrogen Anneals R. Engel-Herbert, Y. Hwang, N.G. Rudawski, S. Stemmer, University of California, Santa Barbara |
| 4:20pm | EM+SS-WeA8 Valence Band Alignment in low-k Dielectric/Cu Interconnects as Determined by X-ray Photoelectron Spectroscopy S. King, M. French, M. Jaehnig, M. Kuhn, Intel Corp. |
| 4:40pm | EM+SS-WeA9 Invited Paper III-V CMOS: A sub-10 nm Electronics Technology? J.A. del Alamo, Massachusetts Institute of Technology |
| 5:20pm | EM+SS-WeA11 Potential Profiles of III-V MOSCAPs with Kelvin Probe Force Microscopy In Situ W. Melitz, J. Shen, S. Lee, J.S. Lee, A.C. Kummel, University of California at San Diego, S. Bentley, D. Macintyre, M. Holland, I. Thayne, University of Glasgow, UK |