As the size of memory cell is scaled down, due to the structural limitation of planar transistor, new structural device is needed, like a recessed channel or FinFET. When using the etch process for a new structure patterning, however, exposure of Si surfaces to a reactive plasma can result physical damages. These effects lead to degradation of electrical properties of silicon substrates. Therefore, it is necessary to identify the measurable damage and then to design for reducing physical damage and/or removing the damaged layers without any further damage. In this study, using SRIM(Stopping and Range of Ions in Matter), we simulate ion distribution and damage region in the Silicon with etch species and Vdc, and using TEM, SE(Spectro Ellipsometry), RBS (Rutherford backscattering spectroscopy), we analyze the physical thickness of the damaged layer that depends on etch condition (Ion energy, selectivity to Si). In order to quantify the damage of exposed Silicon surface by etch process, the amount of defect was electrically calculated, respectively for Si/SiO2 interface and Silicon bulk defect, using the charge pumping and gate controlled diode pattern at the MOSFET TEG. We found that defect density of high ion energy and high selectivity condition is bigger over a few order than low energy and low selectivity condition. In the latter case, the ion penetration depth is shallower and even damaged layer was also simultaneously etched during the process, but, in the former case, highly damaged layer was formed in the early stage of plasma exposure and defects were accumulated by increasing exposure time. To remove the damaged layers, normally we’re using the light etch as post etch treatment. That is very effective to remove in case of highly damaged surface, but, in case of low damaged Silicon surface, light etch itself increase the amount of damage. So we have to choose well controlled treatment process with the degree of damage for improving the properties of Silicon substrate. The obtained results enable us to predict the etching induced physical damage to the devices in advance at the stage of plasma etch process design.