| AVS 57th International Symposium & Exhibition | |
| Plasma Science and Technology | Monday Sessions |
| Session PS-MoM |
| Session: | Advanced BEOL / Interconnect Etching I |
| Presenter: | Y. Zhou, Applied Materials Inc. |
| Authors: | Y. Zhou, Applied Materials Inc. Z. Cui, Applied Materials Inc. J. Pender, Applied Materials Inc. S. Nemani, Applied Materials Inc. M. Naik, Applied Materials Inc. |
| Correspondent: | Click to Email |
Higher porosity and new film chemistry are required to drive down k value of porous ultra low k (ULK) dielectrics integrated in advanced BEOL stacks. The challenge of integrating ULK dielectrics is compounded by shrinking dimensions. Taking a tri-layer resist via-first-trench-last integration scheme as an example, as the technology nodes progress, lower k value dielectrics are more prone to ashing damage. The resulting damaged layer accounts for a larger percentage of remaining film, resulting in higher integrated k value. Therefore, ashing improvement achieved for earlier nodes is not sufficient for the 22nm node. A particular ULK integration challenge is via to line spacing. The tight pitches at 22nm leave little tolerance for enlargement of the via size and shape. Previously acceptable levels of profile bowing can now directly lead to shorting. In this work, the challenges of ashing damage and via profile bowing are examined with a via first trench last integration scheme. It is identified that ashing is responsible for the majority of via profile bowing, and the key to reducing via bowing and ashing damage is to improve the ashing selectivity of organic mask to dielectrics. Different approaches are taken to improve ashing selectivity, including the traditional ashing chemistry/plasma optimization and a new pre-ash dielectric passivation scheme. These optimizations have significantly improved both physical and electrical performance.