AVS 52nd International Symposium
    Plasma Science and Technology Monday Sessions
       Session PS-MoP

Paper PS-MoP5
Reduction of Gate Oxide Plasma Induced Damage via Silicon Nitride Backside Film

Monday, October 31, 2005, 5:00 pm, Room Exhibit Hall C&D

Session: Plasma Science and Technology Poster Session
Presenter: H. McCulloh, National Semiconductor
Authors: H. McCulloh, National Semiconductor
C. Bossie, National Semiconductor
P. Allard, National Semiconductor
J. Garmon, National Semiconductor
C. Printy, National Semiconductor
Correspondent: Click to Email
Plasma charging damage continues to be an issue in advanced semiconductor processing. In this work, the effect of residual films on the backside of the wafer on plasma damage induced at interconnect layers is investigated. Our experimental results show that intermetal dielectrics formed using fluorinated high density plasma (FHDP) are particularly prone to causing plasma induced damage (PID). The current work shows that residual material on the backside of the wafer has a strong impact on this damage. It is proposed that the presence of a conductive or semi-conductive backside film contributes to PID via electrical coupling through the electrostatic chuck (ESC) during the FHDP deposition process. Our results show that the presence of a uniform silicon nitride film on the back of the wafer dramatically reduces gate oxide damage caused by PID. Different backside film integration schemes were studied. PID was evaluated using metal antenna style test structures, with FHDP being deposited directly on the antenna.