AVS 51st International Symposium
    Nanometer-scale Science and Technology Wednesday Sessions
       Session NS-WeM

Invited Paper NS-WeM7
Nanoscale Patterning in Application to Novel Materials and Device Structures

Wednesday, November 17, 2004, 10:20 am, Room 213D

Session: Nanoscale Patterning and Lithography
Presenter: N. Zhitenev, Bell Labs, Lucent Technologies
Correspondent: Click to Email

As the size of electronic devices shrinks down to atomic scale, device properties are increasingly dependent on physics and chemistry of interfaces or interfacial networks. The growth, the patterning and the characterization of such systems at nanometer scale present significant challenges and opportunities. Extremely small devices can display useful functionality based on new physical phenomena. On the other hand, direct lithography requiring deposition of resists, exposure to radiation and to wet/dry chemistry can strongly modify the device properties. Possible solutions are to perform the most invasive patterning before the growth or out of a potentially delicate device structure. We study such fabrication schemes in application to the patterning of self-assembled molecular monolayers between metal electrodes. The first approach uses pre-fabricated masks to confine the deposition of materials. The size of the features is controlled by shadow angle evaporation. Another method uses nanoimprinting to deliver patterned metal onto molecular layer. Metal-molecular layer-metal junctions are fabricated with the size down to ~10-100 nm. While certain electrical properties are fairly reproducible, these techniques provide only initial foothold toward the fabrication of nanoscale interfacial devices. The critical issues that determine the overall performance and require further research are control of the surface topography and the grain structure of metals, doping of the molecular layers by the contacts and formation of the chemical bonds at the interfaces.