AVS 50th International Symposium
    Plasma Science and Technology Friday Sessions
       Session PS-FrM

Paper PS-FrM9
Integrated Modeling of Etching, Cleaning and Barrier Coating PVD for Porous and Conventional SiO@sub 2@ for Fluorocarbon Based Chemistries@footnote 1@

Friday, November 7, 2003, 11:00 am, Room 315

Session: Plasma-Surface Interactions: Etching
Presenter: A. Sankaran, University of Illinois at Urbana-Champaign
Authors: A. Sankaran, University of Illinois at Urbana-Champaign
M.J. Kushner, University of Illinois at Urbana-Champaign
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The modeling of process integration of advanced materials for interconnect wiring can provide insights to methods to optimize the process. This is particularly true for nontraditional materials, such as porous silica. In this work we discuss the modeling of the process integration steps of etch, clean and barrier coating for porous SiO@sub 2@ using a feature profile simulator coupled to a plasma equipment model. Results will be discussed for ICP and MERIE reactors for etching of conventional and porous SiO@sub 2@ for C@sub 2@F@sub 6@, CHF@sub 3@ and C@sub 4@F@sub 8@ in mixtures with Ar and O@sub 2@. The etch step is followed by the stripping of the residual fluorocarbon polymer layer and of the photoresist. The cleaned features then receive a barrier coating by IMPVD. Etch rates and profiles for interconnected and closed pore networks will be presented. In general, larger molecular weight fluorocarbon gases produce more polymerizing fluxes to the substrate leading to thicker polymer films and hence slower etch rates. Polymer build-up due to opening of large pores and interconnected pore networks leads to slower etching. Increasing O@sub 2@ during the etch step reduces polymer buildup but also erodes the photoresist, resulting in less taper (possibly bowing) due to the broader view angles of the incident ion fluxes. Removal of polymer from the pores during the clean step, particularly when interconnected, is problematic. Conformal metal films (for the barrier layer) on porous substrates are more difficult to achieve for larger pores and higher interconnectivities due to shadowing of ion fluxes caused by the complex pore morphology. @FootnoteText@ @footnote 1@ Work supported by Semiconductor Research Corporation SEMATECH and National Science Foundation.