AVS 50th International Symposium
    Plasma Science and Technology Friday Sessions
       Session PS-FrM

Paper PS-FrM10
Analysis of ILD Sidewall Damage during Photoresist Removal Post Single and Dual Damascene Processing

Friday, November 7, 2003, 11:20 am, Room 315

Session: Plasma-Surface Interactions: Etching
Presenter: N.C.M. Fuller, IBM T.J. Watson Research Center
Authors: N.C.M. Fuller, IBM T.J. Watson Research Center
T.J. Dalton, IBM T.J. Watson Research Center
M.E. Colburn, IBM T.J. Watson Research Center
S.M. Gates, IBM T.J. Watson Research Center
R. Dellaguardia, IBM Microelectronics Division
Correspondent: Click to Email
The introduction of CVD and SOD low-@kappa@ organosilicate (OSGs) materials for 90 nm and beyond CMOS back end of the line (BEOL) technologies presents several process challenges. One such challenge is the minimization of ILD sidewall damage during photoresist removal post single and dual damascene processing. The determination of the composition, thickness, and probable mechanism of formation of the damaged layer is critical to its control, prevention, and/or removal and, thus, device performance, functionality, and reliability. To these ends, experimental measurements including XPS and TEM/EELS were performed to characterize the damaged layer formed on an OSG and a porous OSG material exposed to various strip chemistries in a commercial plasma etching tool. These results will be presented.