AVS 50th International Symposium
    Plasma Science and Technology Monday Sessions
       Session PS+MM-MoA

Paper PS+MM-MoA1
Understanding Deep Silicon Etching: Mechanisms for Formation and Removal of Sidewall Passivation

Monday, November 3, 2003, 2:00 pm, Room 315

Session: MEMS Etching
Presenter: M.L. Steen, IBM T.J. Watson Research Center
Authors: M.L. Steen, IBM T.J. Watson Research Center
T.J. Dalton, IBM Semiconductor Research and Development Center
C.K. Tsang, IBM T.J. Watson Research Center
R.W. Nunes, IBM T.J. Watson Research Center
J. Vichiconti, IBM T.J. Watson Research Center
E.A. Sullivan, IBM T.J. Watson Research Center
B.N. To, IBM T.J. Watson Research Center
D. Barrett, IBM T.J. Watson Research Center
Correspondent: Click to Email
One of the interesting aspects of deep silicon etching is the diversity of process requirements. In addition to high throughput, many applications have added demands on profile shape and surface morphology. Supporting such applications hinges on rational control of sidewall passivation. Two fluorine-based methods are used to achieve high silicon etch rates, each with its own variation of sidewall passivation. Most widely used is time-multiplexed deep etching (TMDE), wherein the etching and passivating cycles are performed sequentially. Sidewall passivation is accomplished via polymer deposition at room temperature. Alternately, a second method involves cryogenic cooling of the wafer to reduce lateral etching. However, problematic to both of these processes, the thickness of the sidewall-passivating layer is not uniform with etch depth. In cryogenic etching, the blocking layer is very thin, thereby making it difficult to maintain a consistent thickness over the entire etch depth. In TMDE, the thickness of the polymer covering decreases rapidly at greater depths and lateral etching increases there to form an undesirable bowed or barreled etch profile. This is particularly problematic for applications that have tight specifications for sidewall structure. Our goal is to understand the role the passivating layer plays in the formation of sidewall structure. Toward this goal, a number of process variables were explored using a commercial, inductively-coupled plasma etcher. We report a method that tailors the shape of the profile through better control of the formation and subsequent removal of the passivating layer. A significant increase in the silicon etching rate, minimization of mask undercut, and substantial reduction in bowing will be discussed. Overall, our method demonstrates enhanced process performance and flexibility to meet a broad range of needs in deep silicon etching.