AVS 50th International Symposium
    Manufacturing Science and Technology Wednesday Sessions
       Session MS-WeM

Paper MS-WeM8
Prototype Development of Four-Point Probe with 100 µm Probe-Spacing for Resistivity Measurements

Wednesday, November 5, 2003, 10:40 am, Room 326

Session: Sensors, Metrology, and Control
Presenter: M. Suzuki, NTT-AT, Japan
Authors: M. Suzuki, NTT-AT, Japan
Y. Sato, NTT-AT, Japan
T. Ogiwara, NTT-AT, Japan
S. Kiyota, Kiyota Manufacturing Co., Japan
K. Watanabe, Kiyota Manufacturing Co., Japan
N. Matsubayashi, AIST, Japan
S. Matsumoto, Keio University, Japan
Correspondent: Click to Email
The four-point probe technique has been used commonly to measure the semiconductor resistivity. It is, however, difficult to detect changes in resistivities over distances smaller than 3 mm because of the standard probe-spacing of 1 mm. With the reduced dimension of devices, it is very significant to determine resistivity variations on a very small scale. Thus we have developed the prototype of the four-point probe with 100 µm probe-spacing and confirmed the adaptability for practical use. The four probes are made from 50-µm-diameter tungsten carbide wire, and their apexes are ground down to a radius of 20 µm. It is found that the tip apex is durable and is not contaminated after 1.5 x 10@super 5@ times probing onto the Si surface. The measurement system is constructed with mechanical driving parts, a commercial dc current source, and a digital voltage meter under the design concept same as the conventional four-point probe technique. We have demonstrated that it is possible to measure the resistivity radially across a Si wafer very near the wafer edge (about 0.5 mm), while conventional system with 1 mm probe-spacing was limited to measure the resistivity to the points of about 4 mm from the wafer edge. This 100-µm probe can also measure the resistivity in the phosphorus-doped poly-silicon film of 0.5 x 0.5 mm@super 2@ on an oxidized Si wafer. Our results suggest that the probe can measure a resistivity distribution on one LSI chip area, and that this system will be used as a monitoring tool for various fabrication processes. This project was performed with the financial support of Ministry of Economy, Trade, and Industry, Japan.