AVS 50th International Symposium
    Manufacturing Science and Technology Tuesday Sessions
       Session MS-TuM

Invited Paper MS-TuM3
Interfacial Engineering for Reliability Improvement of Cu/Low k Interconnects

Tuesday, November 4, 2003, 9:00 am, Room 309

Session: Packaging and Role of Interface Engineering in IC Processing
Presenter: P.S. Ho, University of Texas
Correspondent: Click to Email

With continuing device scaling, interfaces of dielectrics, metals and semiconductors become increasingly important in controlling the yield and reliability of devices and interconnects. Beyond the current 130 nm technology node, the implementation of low k dielectrics causes serious reliability concerns for Cu interconnects due to their weak thermomechanical properties. This paper will first discuss the role of interfaces in controlling the reliability of the Cu damascene structure, particularly regarding electromigration and stress voiding. Several approaches of interfacial engineering to improve Cu interconnect reliability will be discussed, including surface processing and overcoat layers to reduce mass transport and to increase adhesion strength. Central to these approaches is the optimization of the chemical bonding to improve the properties of interfaces and low k dielectrics. The effects on electromigration and stress voiding of Cu/low k interconnects will be discussed.