AVS 50th International Symposium
    Manufacturing Science and Technology Tuesday Sessions
       Session MS-TuA

Invited Paper MS-TuA3
Technology and Manufacturing Challenges in High Tech

Tuesday, November 4, 2003, 2:40 pm, Room 309

Session: Directions in Semiconductor Device Scaling for the Next Decade
Presenter: S.M. Rossnagel, IBM T.J. Watson Research Center
Authors: R.L. Wisnieff, IBM Corporation
S.M. Rossnagel, IBM T.J. Watson Research Center
Correspondent: Click to Email
Semiconductor technology is currently going through a fundamental transition, for the last forty years the active device has been the primary limitation in circuit performance, however today the wiring that interconnects the active devices is rapidly becoming the largest factor in determining the maximum speed the circuit will operate at. The search for high performance interconnects led to the widespread adoption of copper wiring to lower the resistance and, more recently, to the introduction of low dielectric constant materials to lower the capacitance of the interconnect circuit. The research and development of copper wiring spanned a period of roughly 12 years with much of this time was spent in refining the technology to achieve high reliability and yield. The research and development of lower dielectric constant materials is being undertaken at a much faster pace over a period of 5 years materials have been developed and applied to product. This accelerated schedule has left substantial room for improvement in the materials and processes that are being used. It is likely that there will be a series of incremental improvements ultimately culminating in a wiring technology that will use air gaps.