AVS 50th International Symposium
    Manufacturing Science and Technology Monday Sessions
       Session MS-MoM

Paper MS-MoM10
Profile Control for Deep Silicon Etch by Sidewall Passivation in High Density Plasma

Monday, November 3, 2003, 11:20 am, Room 309

Session: Process and Equipment Integration and Development
Presenter: M. Khbeis, Laboratory for Physical Sciences
Authors: M. Khbeis, Laboratory for Physical Sciences
G. Metze, Laboratory for Physical Sciences
K. Powell, Trikon Technologies, Ltd.
D. Thomas, Trikon Technologies, Ltd.
A. Pentland, Trikon Technologies, Ltd.
J. Hutchings, Trikon Technologies, Ltd.
Correspondent: Click to Email
Deep silicon etching of micron-sized structures is a critical step in high-aspect ratio via fabrication. This paper shows that m=0 Resonant Induction (M0RI) plasma technology coupled with the use of both etch and passivation gases produced deep via holes with unscalloped sidewalls at non-cryogenic temperatures. Process development, operational parameters, and potential applications are discussed. Wafer level packaging of high density, complex systems-on-chip is of great interest to the microelectronics industry for the production of compact devices and electronic components.@footnote 1@ Vertical integration of various unpackaged integrated circuits can be accomplished through die attachment, wafer-to-wafer bonding, thinning, and lastly high-aspect ratio backside interconnects for signal communication. During the fabrication of these 3-D systems there is a need to provide high-aspect ratio backside metal interconnects at a depth of at least 20µm. The fabrication of interconnect via holes dictate that the following etches be performed; oxide mask etch, bulk silicon etch, and buried oxide layer etch. Other potential applications for deep silicon etch include bulk micromachining for MEMS, ground/power plane connections, or re-routing of signal lines for novel packaging. In this paper, development of the deep bulk silicon etch is emphasized. To accommodate subsequent dielectric passivation and metallization steps, via holes were specified to have a profile angle of 89 to 90 degrees with absolutely no sidewall scalloping. Sidewall scalloping will impede metal transport during a high-pressure reflow process. Since deep reactive ion etch (DRIE) processes, such as Bosch, induce scalloping, alternative etch technologies that do not require switching of etchants and passivants are mandatory. @FootnoteText@@footnote 1@ J. Reche & E. Korczynski, High-Density Thru-Silicon Interconnects, HDI Expo Proceedings,(2000).