AVS 50th International Symposium
    High-k Gate Dielectrics and Devices Topical Conference Monday Sessions
       Session DI-MoM

Paper DI-MoM5
First Principles Studies of the Electronic and Atomic Structures of ZrO@sub 2@/Si and ZrSiO@sub 4@/Si Interfaces

Monday, November 3, 2003, 9:40 am, Room 317

Session: Electronic Properties of High-k Dielectrics and their Interfaces
Presenter: R. Puthenkovilakam, University of California, Los Angeles
Authors: R. Puthenkovilakam, University of California, Los Angeles
Y.-S. Lin, University of California, Los Angeles
J.P. Chang, University of California, Los Angeles
Correspondent: Click to Email
First principles simulations using density functional theory is employed to investigate the electronic properties of ZrO@sub 2@/Si and ZrSiO@sub 4@/Si interfaces for their potential applications in metal-oxide-semiconductor field effect transistors. Tetragonal zirconia and zircon are used to model ZrO@sub 2@ and ZrSiO@sub 4@, respectively, and the interfaces are formed by lattice matching their (001) surfaces to the Si(100) surface. The electronic structure of ZrO@sub 2@/Si interfaces showed partial occupation of zirconium d states at the Fermi level when the zirconium coordination is different from its bulk coordination. These partially occupied states lie within the silicon band gap, forming conductive paths under an applied potential field, thus are detrimental to the device performance. However, ZrSiO@sub 4@/Si interface showed no partial occupation of zirconium d states at Fermi level. Hydrogen passivation of zirconium dangling bonds as well as oxygen bridging at the interface are shown to effectively remove the partial occupancy of d orbitals. The calculated band offsets of ZrO@sub 2@/Si interfaces showed asymmetric band alignments, with conduction band offsets between 0.73-0.98 eV and valence band offsets between 3.70-3.95 eV for different zirconium and oxygen coordinations at the ZrO@sub 2@/Si interfaces. The ZrSiO@sub 4@/Si interface resulted in a more symmetric band alignment with a much higher conduction band offset of 1.90 eV and a valence band offset of 2.98 V. These results suggest that ZrSiO@sub 4@ forms a superior interface with silicon compared to ZrO@sub 2@ and can be an ideal candidate for replacing SiO@sub 2@ as a gate insulator in silicon based microelectronics and additional interface preparation or post-deposition annealing are required for ZrO@sub 2@ to yield adequate electronic properties.