AVS 50th International Symposium
    High-k Gate Dielectrics and Devices Topical Conference Monday Sessions
       Session DI-MoM

Invited Paper DI-MoM3
Challenges and Progress on High-K Devices and Materials

Monday, November 3, 2003, 9:00 am, Room 317

Session: Electronic Properties of High-k Dielectrics and their Interfaces
Presenter: H.-H. Tseng, Motorola
Correspondent: Click to Email

High-K gate dielectric research is critical for advanced technology because the standby power increases significantly for ultra-thin SiO2 based gate dielectric. Although progress has been made in the past, there are huge challenges remained to be solved. This paper presents the challenges and progress of High-K devices and materials. Issues related to High-K device performance such as transconductance and mobility degradation, and high threshold voltage will be discussed. Challenges of reliability related topics such as threshold voltage instability, negative bias temperature instability (NBTI), stress-induced leakage current (SILK) will also be presented. Recent progress to address these challenges will be discussed. Finally, new research directions of High-K/gate electrode stack to meet the future technology requirements will be outlined.