The aggressive down-scaling of the silicon based metal-oxide-semiconductor field effect transistor (MOSFET) replies strongly on the materials and the resultant electrical properties associated with the dielectric material employed to isolate the transistor gate from the silicon. Currently, the major challenges in integrating high-k materials include a thorough understanding of the thermal stability of these materials on silicon and an effective etching chemistry in patterning these materials. In this talk, I will discuss current research progress in atomic layer controlled deposition of high-k dielectric films on silicon with tailored electronic, chemical, interfacial, thermal, and mechanical properties, followed by discussions on plasma patterning of the high-k materials. Specifically, research work on ZrO@sub 2@ and HfO@sub 2@ thin films and their thermal stability, dielectric function, and integration on silicon surfaces will be presented. The talk will focus on linking the molecular coordination and film morphology to the electronic properties of the high-k dielectrics, and elucidating the reaction pathways leading to the deposition of thermally stable, stoichiometric, amorphous, smooth, uniform, and highly conformal high-k dielectrics. Plasma enhanced etching of metal oxides in halogen based chemistries will be presented, including the effect of ion energy and ion type on etching rate and etching selectivity. I will also highlight some new research directions that aim at enabling the predictive engineering of a superior high-k/silicon interface and its associated device performance through ab initio calculations.