AVS 49th International Symposium
    Plasma Science Monday Sessions
       Session PS1-MoA

Paper PS1-MoA10
Transfer of Resist Roughness into Substrates during Plasma Etching

Monday, November 4, 2002, 5:00 pm, Room C-103

Session: Dielectric Etch I
Presenter: A.P. Mahorowala, IBM T.J. Watson Research Center
Authors: A.P. Mahorowala, IBM T.J. Watson Research Center
D.L. Goldfarb, IBM T.J. Watson Research Center
G.M. Gallatin, IBM T.J. Watson Research Center
D. Pfeiffer, IBM T.J. Watson Research Center
K.E. Petrillo, IBM T.J. Watson Research Center
K. Babich, IBM T.J. Watson Research Center
M. Angelopoulos, IBM T.J. Watson Research Center
Correspondent: Click to Email
Traditionally photoresists have been evaluated on the basis of their lithographic process latitude and etch resistance. For sub-150 nm process technologies, this is inadequate because the deviations in linewidth caused by a photoresist's inherent roughness and transferred into the substrate during etch can be comparable to the maximum allowable tolerance. The photoresist roughness issue has been exacerbated by the introduction of 193 nm photoresists whose films are not only thin but whose etch resistance is poorer than the 248 nm photoresists widely used. The photoresists used in conjunction with 157 nm and EUV lithographies are expected to be even thinner. This paper systematically studies the roughness transfer into an oxide substrate when using 248 nm, 193 nm and 157 nm photoresists in conjunction with organic and inorganic anti-reflective coatings/hard masks. Photoresist thickness, minimum feature size, plasma etch chemistry and time were varied as a part of this study. The analysis is based on cross-sectional and top down SEM micrographs and careful measurement of the sidewall roughness using AFM. The relative contributions of the photoresist material, development conditions, and the etching conditions to the roughness of the final image are determined and explained. Recommendations to prevent roughness transfer into the substrate are made.