AVS 49th International Symposium
    Plasma Science Tuesday Sessions
       Session PS-TuM

Invited Paper PS-TuM7
Low Energy Electron Enhanced Etching (LE4) for Reduced Process Damage in Compound Semiconductor Devices

Tuesday, November 5, 2002, 10:20 am, Room C-103

Session: Atmospheric Pressure and Other Emerging Plasma Applications
Presenter: H.P. Gillis, University of California, Los Angeles
Authors: H.P. Gillis, University of California, Los Angeles
S.H. Lee, University of California, Los Angeles
D.I. Margolese, Systine, Inc.
S.J. Anz, Systine, Inc.
Correspondent: Click to Email
Dry etching for defining device features is a key process in manufacturing integrated circuits because it controls critical dimensions much more tightly than does wet etching. Indeed, the ability to etch transistor features at dimensions progressively smaller than 0.25 ?m has been a mainstay of the computer industry, and is one of the foundations of Moore's Law. As a side effect, the conventional dry etch methods inflict "etch process damage" caused by the surface ion bombardment needed for high resolution feature definition. Consequently, the need arises for developing alternative dry etch processes and for characterizing "etch process damage" in material terms to guide its control and elimination. We will describe an alternative dry etch method in which electrons with energies below about 15 eV stimulate high-resolution etching of features as small as 0.020 ?m with no apparent damage. Along with high-resolution feature definition, this method gives mirror-smooth etched surfaces and maintains stoichiometry of compound materials. We will relate these results to plasma conditions including the electron temperature and energy distribution. The discussion will emphasize compound semiconductor materials and applications for optical and wireless communications.