IUVSTA 15th International Vacuum Congress (IVC-15), AVS 48th International Symposium (AVS-48), 11th International Conference on Solid Surfaces (ICSS-11)
    Microelectromechanical Systems (MEMS) Thursday Sessions
       Session MM-ThP

Paper MM-ThP2
A Trench Etching Technique Using MERIE to Fabricate MEMS Accelerometers

Thursday, November 1, 2001, 5:30 pm, Room 134/135

Session: Poster Session
Presenter: K.-W. Kok, National University of Singapore, TEMIC Automotive (Singapore) Pte Limited
Authors: K.-W. Kok, National University of Singapore, TEMIC Automotive (Singapore) Pte Limited
W.J. Yoo, National University of Singapore
Correspondent: Click to Email
Plasma etching is an important process to form deep high aspect ratio beams in fabrication of MEMS devices. Properties pertaining to the anisotropic trench etching process have been studied using SiF4/HBr/NF3/HeO2 gas mixtures by a magnetically enhanced reactive ion etcher (MERIE). We investigated the taper angle and etching rate in the trenches, the dependency of the etching rates on pattern-size and open area ratio, and roughness on the sidewall. The etching masks of SiO2 and Si3N4 were used. In these conditions, etching selectivities of the silicon substrate with respect to the etching mask were in the range of 60 to 120 for the SiO2 mask and these were about three times higher than for the Si3N4 mask. The high etching selectivities from the SiO2 mask resulted in the steep trench profile and this made possible to form the deep trench structures of the aspect ratio of 25. Furthermore, the open area ratio on the wafer was varied in the range of 10% to 50% to determine loading effects which are problematic in inductively coupled plasma (ICP) etching. Etching rates and their uniformity across the wafer in the ICP were known to be strongly affected by the open area ratio. We found that, in the MERIE, the etching rates remained constant and their uniformity was less than 2% regardless of the open area ratio for the all pattern sizes investigated. The surface roughness on the sidewall was maintained within 5nm after deep trench etching up to 20mm, and the electrical test proved that this was acceptable to control capacitance of the MEMS accelerometers accurately.