AVS 47th International Symposium
    Semiconductors Wednesday Sessions
       Session SC+EL+SS-WeP

Paper SC+EL+SS-WeP13
High Density Plasma Via Hole Etching In SiC

Wednesday, October 4, 2000, 11:00 am, Room Exhibit Hall C & D

Session: Poster Session
Presenter: H. Cho, Miryang National University, South Korea
Authors: H. Cho, Miryang National University, South Korea
K.P. Lee, University of Florida
P. Leerungnawarat, University of Florida
S.N.G. Chu, Lucent Technologies, Bell Laboratories
F. Ren, University of Florida
C.-M. Zetterling, Royal Institute of Technology (KTH), Sweden
S.J. Pearton, University of Florida
Correspondent: Click to Email
Through-wafer vias ~100µm deep were formed in 6H-SiC substrates by Inductively Coupled Plasma etching with SF@sub 6@/O@sub 2@ at rates up to 0.8 µm·min@super -1@ and employing Al masks. Selectivies of @>@40 in SiC over Al were achieved. Electrical (C-V, I-V) and chemical (AES) analysis techniques showed that the etching produced only minor changes in reverse breakdown voltage, Schottky barrier height and near-surface stoichiometry of the SiC and had high selectivity over common front side metallization. The SiC etch rate and etch yield were measured as a function of plasma composition along with the selectivity over Al. This process is attractive for power SiC transistors intended for high current, high temperature applications.