AVS 47th International Symposium
    Dielectrics Wednesday Sessions
       Session DI+EL+MS-WeM

Paper DI+EL+MS-WeM8
Rapid Prototyping by Local Deposition of Siliconoxide and Tungsten Nanostructures for Interconnect Rewiring

Wednesday, October 4, 2000, 10:40 am, Room 312

Session: Low K Dielectrics
Presenter: E. Bertagnolli, Vienna University of Technology, Austria
Authors: H.D. Wanzenboeck, Vienna University of Technology, Austria
S. Harasek, Vienna University of Technology, Austria
H. Langfischer, Vienna University of Technology, Austria
A. Lugstein, Vienna University of Technology, Austria
E. Bertagnolli, Vienna University of Technology, Austria
Correspondent: Click to Email
The local deposition of dielectric material and metal wires as typically used for rewiring of interconnect layers has been demonstrated to be a promising approach for rapid prototyping of integrated circuits. With an ion beam induced surface reaction dielectric structures were fabricated with a selected geometric configuration in dimensions ranging from several hundred µm down to the deep sub-µm scale displaying the potential application in interconnect modification. A focused Ga ion beam at 50 kV acceleration voltage was applied to induce the surface decomposition of gaseous precursors. A dynamic adsorption state was achieved characterized by the equilibrium between influx through a nozzle system and the outlet through the vacuum pump. Siliconoxide was obtained by using siliconorganic compounds and oxygen as precursor adsorbed on the surface at a total pressure typically between 10E-5 to 10E-6 Torr. Conductive W-structures were obtained using W(CO)6. The suitability for practical applications in microelectronics has been demonstrated by measuring the electrical properties of deposited dielectrics using test vehicles with a metal-insulator-metal (MIM) capacitor setup. The thickness of the dielectric layer was varied between 70 nm and 1.4 µm. The resistivity and capacitance of FIB deposited dielectrics was found to vary with deposition parameters such as exposure time and scanning rate of the ion beam. A chemical characterization of the fabricated dielectric layers has been performed. The electrical properties of locally deposited dielectrics were correlated with the material composition of the deposited material. The suggested optimized deposition process can provide improved dielectrics suitable as interline and interlayer insulator for a complex microelectronic interconnect architecture.