AVS 47th International Symposium
    Dielectrics Wednesday Sessions
       Session DI+EL+MS-WeA

Invited Paper DI+EL+MS-WeA1
Materials Considerations for High-K Gate Dielectrics for Scaled CMOS

Wednesday, October 4, 2000, 2:00 pm, Room 312

Session: Alternate Gate Dielectrics
Presenter: G.D. Wilk, Lucent Technologies
Authors: G.D. Wilk, Lucent Technologies
R.M. Wallace, University of North Texas
Correspondent: Click to Email
Many materials systems are currently under consideration as potential replacements for SiO@sub 2@ as the gate dielectric material for sub-0.13 µm CMOS technology. A systematic consideration of the required properties of gate dielectrics, however, indicates that the key issues for selecting a high-k dielectric are permittivity and band offset, thermodynamic stability, crystal structure, and compatibility with the current or expected materials to be used in processing for CMOS devices. Many dielectrics satisfy some of these criteria, but very few materials actually satisfy all. A review of current work and literature in the area of high-k gate dielectrics is given, and some conclusions are drawn for various systems based on reported results and fundamental materials considerations.