AVS 46th International Symposium
    Plasma Science and Technology Division Monday Sessions
       Session PS-MoM

Paper PS-MoM8
Evaluation of Tests to Examine Charging Damage in Ion Implantation and Plasma Processes

Monday, October 25, 1999, 10:40 am, Room 609

Session: Plasma Damage
Presenter: M.J. Goeckner, Varian Semiconductor Equipment Associates
Authors: M.J. Goeckner, Varian Semiconductor Equipment Associates
J. Erhardt, AMD Inc.
S.B. Felch, Varian Semiconductor Equipment Associates
K. Ahmed, AMD Inc.
Correspondent: Click to Email
Charging damage is a critical issue in both plasma processing and ion implantation systems. Charging damage is typically studied with one of several distinct types of test structures. One of the more common is an "antenna" MOS capacitor test structure. After the device is subjected to the charging environment, plasma or implantation, the gate dielectric is then analyzed for damage. For this paper, we will examine three analysis techniques on various dielectrics. These analysis techniques are: measurement of temporal change in induced voltage at a low current density (dV/dt); measurement of induced leakage current at a low voltage (~2 V); and measurement of induced voltage at a high, stressing, current density (~1 A/cm@super 2@). Damage to the dielectric will be induced with a controlled damage current, of known length and strength. Dielectrics will range from 100 Å oxide to sub-40 Å nitrided oxides. The purpose of this work is to determine the most appropriate technique for characterizing plasma charging dielectric degradation in the ultra-thin dielectric regime, as well as to gain a baseline understanding of the damage under controlled conditions. It is envisioned that the results of this study can be used as a gauge for future experiments, as well as to provide an estimate of the damage currents in actual ion implantation and plasma processing environments.