The performance of advanced IC chips is limited by the interconnect propagation delays, dispersion, and cross-talk within the Al/SiO@sub 2@ system. The combination of Cu and low-k dielectrics enables a reduction of the interconnect levels and improved reliability. Various deposition methods (MOCVD, PVD, and plating) have been evaluated for Cu. Vacuum-integrated clustering of single-wafer process modules offers advantages for advanced metallization applications. The capability to integrate the pre-clean process with the copper (seed and/or fill) and barrier layers in a vacuum cluster tool prevents atmospheric exposure of the sensitive metallization interfaces, resulting in improved process repeatability and reduced via resistance. A vacuum-integrated MOCVD metallization technology has been developed and demonstrated for formation of high-performance Cu plugs/lines for 0.18 - 0.13 µm IC manufacturing. MOCVD copper seed and gap-fill processes have been integrated with soft plasma clean and barrier deposition processes in a vacuum cluster tool. The MOCVD-Cu process is capable of void-free filling of high-aspect-ratio (up to 8:1) features with low-resistivity (@<=@2 micro-ohm.cm) Cu layers. Excellent copper layer adhesion and copper/barrier microstructure properties have been achieved. The films have shown negligible impurities and large (0.5 - 0.8 µm) grains with <111> texturing. Deposition rates in the range of 400 to 3000 Å/min have been achieved. Inlaid MOCVD copper lines and vias have been fabricated with TiN and TaN barrier layers using CMP damascene processing. MOCVD-Cu offers performance advantages for fabrication of void-free inlaid lines/plugs for all the interconnect levels, including the lower levels with narrower and larger aspect-ratio lines and the upper interconnect levels with wider/thicker and smaller aspect-ratio lines. We have also demonstrated successful process integration of copper electroplating via/trench filling with MOCVD cluster tool barrier and seed formation.