AVS 45th International Symposium
    Plasma Science and Technology Division Tuesday Sessions
       Session PS1-TuM

Paper PS1-TuM4
Pitting-Free Gate Etching by Lowering Bias Frequency in Pulsed ECR Plasma with a Divergent Magnetic Field

Tuesday, November 3, 1998, 9:20 am, Room 314/315

Session: Pulsed Plasmas
Presenter: H. Morioka, Fujitsu Ltd., Japan
Authors: H. Morioka, Fujitsu Ltd., Japan
A. Hasegawa, Fujitsu Ltd., Japan
D. Matsunaga, Fujitsu Ltd., Japan
N. Abe, Fujitsu Ltd., Japan
Correspondent: Click to Email
In the fabrication of ULSI beyond quarter micron design rule, very high selectivity to gate oxide is one of the essential issues for gate electrode etch process such as poly-Si etching. The reason for this is not only that the gate oxide is getting thinner as the device generation changes, but also that the gate oxide along gate electrodes in a dense pattern region is easily pitted like spikes during overetch (microtrenching), even though the selectivity to the oxide is high enough in the open space. Therefore, excessively high selectivity is required to suppress the pitting in most cases. There are roughly two approaches to achieve high selectivity. one is lowering ion energy by decreasing bias power, and the other is changing chemistry. However, these approaches have disadvantages, that is, lowering ion energy often causes profile distortion such as notching, and the chemistry of high selectivity is sometimes followed by etching residue, strong proximity effect, and "particle" problem because this kind of chemistry tends to enhance polymer deposition on the wafer and chamber wall. Therefore, we have studied effects of bias frequency and pulsed plasma, to suppress the pitting in an alternative way. Our experiments were performed on an ECR plasma etch tool with a divergent magnetic field. Several bias frequencies between 13.56 MHz and 400 KHz with CW and pulsed ECR plasma sources were used to examine their effect to µ-loading of the selectivity and sub-trench depth of half-etch profile. In this experiment, by using pulsed plasma, having a cycle of 100 µs and 25% - 50% duty, and lower bias frequency than 2 MHz, we found that the selectivity µ-loading and the sub-trench depth were decreased, and consequently, we have achieved vertical etched profile without the pitting of the thin gate oxide (2.5 nm). These results imply that the lowering bias frequency (and pulsed plasma) has the efficiency to suppress topography dependent variation of selectivity and etched profile.