AVS 45th International Symposium
    Magnetic Interfaces and Nanostructures Technical Group Wednesday Sessions
       Session MI+EM-WeM

Invited Paper MI+EM-WeM1
Limiting Factors in Dense Pseudo Spin Valve and Spin Dependent Tunneling Memory Arrays

Wednesday, November 4, 1998, 8:20 am, Room 324/325

Session: Spin-dependent Devices: Technology and Processing
Presenter: A.V. Pohm, Nonvolatile Electronics
Authors: A.V. Pohm, Nonvolatile Electronics
M.C. Tondra, Nonvolatile Electronics
C.A. Nordman, Nonvolatile Electronics
J.M. Anderson, Nonvolatile Electronics
Correspondent: Click to Email
For pseudo spin valve or spin dependent memory technology to persist for the coming decades, they must be able to exploit the evolving sub-micron semiconductor technology and adjust to the diminishing conductor widths. However, as pseudo spin valve and spin dependent memory arrays are scaled to 0.1 micron widths or less, a number of factors play a role in limiting ultimately the memory array densities which can be achieved. An analysis has been performed which shows that to achieve adequate stability against thermal agitation for half selected cells, the shape anisotropy in the 25 Angstrom storage layer must be at least 300 Oe for 0.1 x 0.3 micron cells. Half select fields of 100 to 150 Oe are required for the write operation. This necessitates current densities in the GMR sandwich in the 10@super 8@ A/cm@super 2@ range for the sense lines and 10@super 7@ A/cm@super 2@ in the word lines. Although GMR sandwiches can tolerate the high current densities, thin dielectrics and careful use of heat sinks are required to keep the temperature rise modest. Materials such as tungsten must be used for the word line in order to have adequate electro-migration limits. Because of the high resistance and capacitance in the spin dependent tunneling memory cells, semiconductor isolation is necessary for high performance. As a consequence, maximum array density is about ½ of that for pseudo spin valve cells.